Commit d86f9636 authored by Robert Hoo's avatar Robert Hoo Committed by Eduardo Habkost
Browse files

x86: define a new MSR based feature word -- FEATURE_WORDS_ARCH_CAPABILITIES 



Note RSBA is specially treated -- no matter host support it or not, qemu
pretends it is supported.

Signed-off-by: default avatarRobert Hoo <robert.hu@linux.intel.com>
Message-Id: <1539578845-37944-4-git-send-email-robert.hu@linux.intel.com>
[ehabkost: removed automatic enabling of RSBA]
Reviewed-by: default avatarEduardo Habkost <ehabkost@redhat.com>
Signed-off-by: default avatarEduardo Habkost <ehabkost@redhat.com>
parent 07585923

target/i386/cpu.c

+23 −1
Original line number Diff line number Diff line
@@ -1141,6 +1141,27 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { 
        },

        .tcg_features = ~0U,

    },

    /*Below are MSR exposed features*/

    [FEAT_ARCH_CAPABILITIES] = {

        .type = MSR_FEATURE_WORD,

        .feat_names = {

            "rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry",

            "ssb-no", NULL, NULL, NULL,

            NULL, NULL, NULL, NULL,

            NULL, NULL, NULL, NULL,

            NULL, NULL, NULL, NULL,

            NULL, NULL, NULL, NULL,

            NULL, NULL, NULL, NULL,

            NULL, NULL, NULL, NULL,

        },

        .msr = {

            .index = MSR_IA32_ARCH_CAPABILITIES,

            .cpuid_dep = {

                FEAT_7_0_EDX,

                CPUID_7_0_EDX_ARCH_CAPABILITIES

            }

        },

    },

};



typedef struct X86RegisterInfo32 {
@@ -3696,7 +3717,8 @@ static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w, 
                                                        wi->cpuid.reg);

            break;

        case MSR_FEATURE_WORD:

            r = kvm_arch_get_supported_msr_feature(kvm_state, wi->msr.index);

            r = kvm_arch_get_supported_msr_feature(kvm_state,

                        wi->msr.index);

            break;

        }

    } else if (hvf_enabled()) {

target/i386/cpu.h

+8 −0
Original line number Diff line number Diff line
@@ -502,6 +502,7 @@ typedef enum FeatureWord { 
    FEAT_6_EAX,         /* CPUID[6].EAX */

    FEAT_XSAVE_COMP_LO, /* CPUID[EAX=0xd,ECX=0].EAX */

    FEAT_XSAVE_COMP_HI, /* CPUID[EAX=0xd,ECX=0].EDX */

    FEAT_ARCH_CAPABILITIES,

    FEATURE_WORDS,

} FeatureWord;
@@ -730,6 +731,13 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; 
#define CPUID_TOPOLOGY_LEVEL_SMT      (1U << 8)

#define CPUID_TOPOLOGY_LEVEL_CORE     (2U << 8)



/* MSR Feature Bits */

#define MSR_ARCH_CAP_RDCL_NO    (1U << 0)

#define MSR_ARCH_CAP_IBRS_ALL   (1U << 1)

#define MSR_ARCH_CAP_RSBA       (1U << 2)

#define MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY (1U << 3)

#define MSR_ARCH_CAP_SSB_NO     (1U << 4)



#ifndef HYPERV_SPINLOCK_NEVER_RETRY

#define HYPERV_SPINLOCK_NEVER_RETRY             0xFFFFFFFF

#endif

target/i386/kvm.c

+11 −0
Original line number Diff line number Diff line
@@ -1975,6 +1975,17 @@ static int kvm_put_msrs(X86CPU *cpu, int level) 
    }

#endif



    /* If host supports feature MSR, write down. */

    if (kvm_feature_msrs) {

        int i;

        for (i = 0; i < kvm_feature_msrs->nmsrs; i++)

            if (kvm_feature_msrs->indices[i] == MSR_IA32_ARCH_CAPABILITIES) {

                kvm_msr_entry_add(cpu, MSR_IA32_ARCH_CAPABILITIES,

                              env->features[FEAT_ARCH_CAPABILITIES]);

                break;

            }

    }



    /*

     * The following MSRs have side effects on the guest or are too heavy

     * for normal writeback. Limit them to reset or full state updates.