Commit d5355087 authored by Hunter Laux's avatar Hunter Laux Committed by Michael Tokarev
Browse files

Add support for the arm breakpoint syscall

OABI arm used a software interrupt(0xef9f0001) for breakpoints.
Since 2005 gdb has used the break instruction(0xe7f001f0) for EABI.
Apparently Steel Bank Common Lisp still uses the swi instruction.

This is the kernel implementation:
http://lxr.free-electrons.com/source/arch/arm/kernel/traps.c#L598



Signed-off-by: default avatarHunter Laux <hunterlaux@gmail.com>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarMichael Tokarev <mjt@tls.msk.ru>
parent 5f22b054
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+1 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ struct target_pt_regs {
#define ARM_THUMB_SYSCALL	0

#define ARM_NR_BASE	  0xf0000
#define ARM_NR_breakpoint (ARM_NR_BASE + 1)
#define ARM_NR_cacheflush (ARM_NR_BASE + 2)
#define ARM_NR_set_tls	  (ARM_NR_BASE + 5)

+4 −0
Original line number Diff line number Diff line
@@ -806,6 +806,9 @@ void cpu_loop(CPUARMState *env)
                            cpu_set_tls(env, env->regs[0]);
                            env->regs[0] = 0;
                            break;
                        case ARM_NR_breakpoint:
                            env->regs[15] -= env->thumb ? 2 : 4;
                            goto excp_debug;
                        default:
                            gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
                                     n);
@@ -849,6 +852,7 @@ void cpu_loop(CPUARMState *env)
            }
            break;
        case EXCP_DEBUG:
        excp_debug:
            {
                int sig;