Commit d304cf01 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20181119' into staging 



target-arm queue:
 * various MAINTAINERS file updates
 * hw/block/onenand: use qemu_log_mask() for reporting
 * hw/block/onenand: Fix off-by-one error allowing out-of-bounds read
   on the n800 and n810 machine models
 * target/arm: fix smc incorrectly trapping to EL3 when secure is off
 * hw/arm/stm32f205: Fix the UART and Timer region size
 * target/arm: read ID registers for KVM guests so they can be
   used to gate "is feature X present" checks

# gpg: Signature made Mon 19 Nov 2018 15:56:44 GMT
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20181119:
  MAINTAINERS: list myself as maintainer for various Arm boards
  hw/block/onenand: use qemu_log_mask() for reporting
  hw/block/onenand: Fix off-by-one error allowing out-of-bounds read
  target/arm: fix smc incorrectly trapping to EL3 when secure is off
  hw/arm/stm32f205: Fix the UART and Timer region size
  MAINTAINERS: Add entries for missing ARM boards
  target/arm: Fill in ARMISARegisters for kvm32
  target/arm: Introduce read_sys_reg32 for kvm32
  target/arm: Fill in ARMISARegisters for kvm64
  target/arm: Install ARMISARegisters from kvm host

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents e6ebbd46 a00d7f20

MAINTAINERS

+92 −14
Original line number Diff line number Diff line
@@ -442,8 +442,9 @@ ARM Machines 
------------

Allwinner-a10

M: Beniamino Galvani <b.galvani@gmail.com>

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

S: Odd Fixes

F: hw/*/allwinner*

F: include/hw/*/allwinner*

F: hw/arm/cubieboard.c
@@ -502,40 +503,46 @@ F: tests/test-arm-mptimer.c 


Exynos

M: Igor Mitsyanko <i.mitsyanko@gmail.com>

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

S: Odd Fixes

F: hw/*/exynos*

F: include/hw/arm/exynos4210.h



Calxeda Highbank

M: Rob Herring <robh@kernel.org>

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

S: Odd Fixes

F: hw/arm/highbank.c

F: hw/net/xgmac.c



Canon DIGIC

M: Antony Pavlov <antonynpavlov@gmail.com>

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

S: Odd Fixes

F: include/hw/arm/digic.h

F: hw/*/digic*



Gumstix

M: Philippe Mathieu-Daudé <f4bug@amsat.org>

M: Peter Maydell <peter.maydell@linaro.org>

R: Philippe Mathieu-Daudé <f4bug@amsat.org>

L: qemu-devel@nongnu.org

L: qemu-arm@nongnu.org

S: Odd Fixes

F: hw/arm/gumstix.c



i.MX31

i.MX31 (kzm)

M: Peter Chubb <peter.chubb@nicta.com.au>

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Odd fixes

F: hw/*/imx*

F: include/hw/*/imx*

S: Odd Fixes

F: hw/arm/kzm.c

F: include/hw/arm/fsl-imx31.h

F: hw/*/imx_*

F: hw/*/*imx31*

F: include/hw/*/imx_*

F: include/hw/*/*imx31*



Integrator CP

M: Peter Maydell <peter.maydell@linaro.org>
@@ -544,6 +551,28 @@ S: Maintained 
F: hw/arm/integratorcp.c

F: hw/misc/arm_integrator_debug.c



MCIMX6UL EVK / i.MX6ul

M: Peter Maydell <peter.maydell@linaro.org>

R: Jean-Christophe Dubois <jcd@tribudubois.net>

L: qemu-arm@nongnu.org

S: Odd Fixes

F: hw/arm/mcimx6ul-evk.c

F: hw/arm/fsl-imx6ul.c

F: hw/misc/imx6ul_ccm.c

F: include/hw/arm/fsl-imx6ul.h

F: include/hw/misc/imx6ul_ccm.h



MCIMX7D SABRE / i.MX7

M: Peter Maydell <peter.maydell@linaro.org>

R: Andrey Smirnov <andrew.smirnov@gmail.com>

L: qemu-arm@nongnu.org

S: Odd Fixes

F: hw/arm/mcimx7d-sabre.c

F: hw/arm/fsl-imx7.c

F: include/hw/arm/fsl-imx7.h

F: hw/pci-host/designware.c

F: include/hw/pci-host/designware.h



MPS2

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org
@@ -561,22 +590,36 @@ F: include/hw/misc/iotkit-sysinfo.h 


Musicpal

M: Jan Kiszka <jan.kiszka@web.de>

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

S: Odd Fixes

F: hw/arm/musicpal.c



nSeries

M: Andrzej Zaborowski <balrogg@gmail.com>

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

S: Odd Fixes

F: hw/arm/nseries.c



Palm

M: Andrzej Zaborowski <balrogg@gmail.com>

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

S: Odd Fixes

F: hw/arm/palm.c



Raspberry Pi

M: Peter Maydell <peter.maydell@linaro.org>

R: Andrew Baumann <Andrew.Baumann@microsoft.com>

R: Philippe Mathieu-Daudé <f4bug@amsat.org>

L: qemu-arm@nongnu.org

S: Odd Fixes

F: hw/arm/raspi_platform.h

F: hw/*/bcm283*

F: include/hw/arm/raspi*

F: include/hw/*/bcm283*



Real View

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org
@@ -588,8 +631,9 @@ F: include/hw/intc/realview_gic.h 


PXA2XX

M: Andrzej Zaborowski <balrogg@gmail.com>

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

S: Odd Fixes

F: hw/arm/mainstone.c

F: hw/arm/spitz.c

F: hw/arm/tosa.c
@@ -598,6 +642,19 @@ F: hw/*/pxa2xx* 
F: hw/misc/mst_fpga.c

F: include/hw/arm/pxa.h



SABRELITE / i.MX6

M: Peter Maydell <peter.maydell@linaro.org>

R: Jean-Christophe Dubois <jcd@tribudubois.net>

L: qemu-arm@nongnu.org

S: Odd Fixes

F: hw/arm/sabrelite.c

F: hw/arm/fsl-imx6.c

F: hw/misc/imx6_src.c

F: hw/ssi/imx_spi.c

F: include/hw/arm/fsl-imx6.h

F: include/hw/misc/imx6_src.h

F: include/hw/ssi/imx_spi.h



Sharp SL-5500 (Collie) PDA

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org
@@ -611,6 +668,12 @@ L: qemu-arm@nongnu.org 
S: Maintained

F: hw/*/stellaris*



Versatile Express

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

F: hw/arm/vexpress.c



Versatile PB

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org
@@ -618,9 +681,17 @@ S: Maintained 
F: hw/*/versatile*

F: hw/misc/arm_sysctl.c



Virt

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

F: hw/arm/virt*

F: include/hw/arm/virt.h



Xilinx Zynq

M: Edgar E. Iglesias <edgar.iglesias@gmail.com>

M: Alistair Francis <alistair@alistair23.me>

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

F: hw/*/xilinx_*
@@ -632,6 +703,7 @@ X: hw/ssi/xilinx_* 
Xilinx ZynqMP

M: Alistair Francis <alistair@alistair23.me>

M: Edgar E. Iglesias <edgar.iglesias@gmail.com>

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

F: hw/*/xlnx*.c
@@ -645,6 +717,7 @@ F: hw/arm/virt-acpi-build.c 


STM32F205

M: Alistair Francis <alistair@alistair23.me>

M: Peter Maydell <peter.maydell@linaro.org>

S: Maintained

F: hw/arm/stm32f205_soc.c

F: hw/misc/stm32f2xx_syscfg.c
@@ -656,11 +729,13 @@ F: include/hw/*/stm32*.h 


Netduino 2

M: Alistair Francis <alistair@alistair23.me>

M: Peter Maydell <peter.maydell@linaro.org>

S: Maintained

F: hw/arm/netduino2.c



SmartFusion2

M: Subbaraya Sundeep <sundeep.lkml@gmail.com>

M: Peter Maydell <peter.maydell@linaro.org>

S: Maintained

F: hw/arm/msf2-soc.c

F: hw/misc/msf2-sysreg.c
@@ -673,11 +748,13 @@ F: include/hw/ssi/mss-spi.h 


Emcraft M2S-FG484

M: Subbaraya Sundeep <sundeep.lkml@gmail.com>

M: Peter Maydell <peter.maydell@linaro.org>

S: Maintained

F: hw/arm/msf2-som.c



ASPEED BMCs

M: Cédric Le Goater <clg@kaod.org>

M: Peter Maydell <peter.maydell@linaro.org>

R: Andrew Jeffery <andrew@aj.id.au>

R: Joel Stanley <joel@jms.id.au>

L: qemu-arm@nongnu.org
@@ -689,6 +766,7 @@ F: include/hw/net/ftgmac100.h 


NRF51

M: Joel Stanley <joel@jms.id.au>

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

F: hw/arm/nrf51_soc.c

hw/block/onenand.c

+14 −10
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ 
#include "exec/memory.h"

#include "hw/sysbus.h"

#include "qemu/error-report.h"

#include "qemu/log.h"



/* 11 for 2kB-page OneNAND ("2nd generation") and 10 for 1kB-page chips */

#define PAGE_SHIFT	11
@@ -594,8 +595,8 @@ static void onenand_command(OneNANDState *s) 
    default:

        s->status |= ONEN_ERR_CMD;

        s->intstatus |= ONEN_INT;

        fprintf(stderr, "%s: unknown OneNAND command %x\n",

                        __func__, s->command);

        qemu_log_mask(LOG_GUEST_ERROR, "unknown OneNAND command %x\n",

                      s->command);

    }



    onenand_intr_update(s);
@@ -608,7 +609,7 @@ static uint64_t onenand_read(void *opaque, hwaddr addr, 
    int offset = addr >> s->shift;



    switch (offset) {

    case 0x0000 ... 0xc000:

    case 0x0000 ... 0xbffe:

        return lduw_le_p(s->boot[0] + addr);



    case 0xf000:	/* Manufacturer ID */
@@ -657,12 +658,13 @@ static uint64_t onenand_read(void *opaque, hwaddr addr, 
    case 0xff02:	/* ECC Result of spare area data */

    case 0xff03:	/* ECC Result of main area data */

    case 0xff04:	/* ECC Result of spare area data */

        hw_error("%s: implement ECC\n", __func__);

        qemu_log_mask(LOG_UNIMP,

                      "onenand: ECC result registers unimplemented\n");

        return 0x0000;

    }



    fprintf(stderr, "%s: unknown OneNAND register %x\n",

                    __func__, offset);

    qemu_log_mask(LOG_GUEST_ERROR, "read of unknown OneNAND register 0x%x\n",

                  offset);

    return 0;

}
@@ -706,8 +708,9 @@ static void onenand_write(void *opaque, hwaddr addr, 
            break;



        default:

            fprintf(stderr, "%s: unknown OneNAND boot command %"PRIx64"\n",

                            __func__, value);

            qemu_log_mask(LOG_GUEST_ERROR,

                          "unknown OneNAND boot command %" PRIx64 "\n",

                          value);

        }

        break;
@@ -757,8 +760,9 @@ static void onenand_write(void *opaque, hwaddr addr, 
        break;



    default:

        fprintf(stderr, "%s: unknown OneNAND register %x\n",

                        __func__, offset);

        qemu_log_mask(LOG_GUEST_ERROR,

                      "write to unknown OneNAND register 0x%x\n",

                      offset);

    }

}

hw/char/stm32f2xx_usart.c

+1 −1
Original line number Diff line number Diff line
@@ -202,7 +202,7 @@ static void stm32f2xx_usart_init(Object *obj) 
    sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);



    memory_region_init_io(&s->mmio, obj, &stm32f2xx_usart_ops, s,

                          TYPE_STM32F2XX_USART, 0x2000);

                          TYPE_STM32F2XX_USART, 0x400);

    sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);

}

hw/timer/stm32f2xx_timer.c

+1 −1
Original line number Diff line number Diff line
@@ -308,7 +308,7 @@ static void stm32f2xx_timer_init(Object *obj) 
    sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);



    memory_region_init_io(&s->iomem, obj, &stm32f2xx_timer_ops, s,

                          "stm32f2xx_timer", 0x4000);

                          "stm32f2xx_timer", 0x400);

    sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem);



    s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, stm32f2xx_timer_interrupt, s);

target/arm/kvm.c

+1 −0
Original line number Diff line number Diff line
@@ -158,6 +158,7 @@ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) 


    cpu->kvm_target = arm_host_cpu_features.target;

    cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;

    cpu->isar = arm_host_cpu_features.isar;

    env->features = arm_host_cpu_features.features;

}