Loading include/exec/memory-internal.h +3 −0 Original line number Diff line number Diff line Loading @@ -45,6 +45,9 @@ void address_space_destroy_dispatch(AddressSpace *as); extern const MemoryRegionOps unassigned_mem_ops; bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr, unsigned size, bool is_write); ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host, MemoryRegion *mr); ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr); Loading memory.c +4 −4 Original line number Diff line number Diff line Loading @@ -851,7 +851,7 @@ const MemoryRegionOps unassigned_mem_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; static bool memory_region_access_valid(MemoryRegion *mr, bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr, unsigned size, bool is_write) Loading Loading
include/exec/memory-internal.h +3 −0 Original line number Diff line number Diff line Loading @@ -45,6 +45,9 @@ void address_space_destroy_dispatch(AddressSpace *as); extern const MemoryRegionOps unassigned_mem_ops; bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr, unsigned size, bool is_write); ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host, MemoryRegion *mr); ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr); Loading
memory.c +4 −4 Original line number Diff line number Diff line Loading @@ -851,7 +851,7 @@ const MemoryRegionOps unassigned_mem_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; static bool memory_region_access_valid(MemoryRegion *mr, bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr, unsigned size, bool is_write) Loading