Commit d108609b authored by Peter Maydell's avatar Peter Maydell
Browse files

target-arm: Fix A64 Neon MLS 



The order of operands for the accumulate step in disas_simd_3same_int()
was reversed. This only affected the MLS instruction, since all the
other accumulating instructions in this category perform an addition
rather than a subtraction.

Reported-by: default avatarLaurent Desnogues <laurent.desnogues@gmail.com>
Tested-by: default avatarLaurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 3a87f8b6

target-arm/translate-a64.c

+1 −1
Original line number Diff line number Diff line
@@ -8925,7 +8925,7 @@ static void disas_simd_3same_int(DisasContext *s, uint32_t insn) 


                genfn = fns[size][is_sub];

                read_vec_element_i32(s, tcg_op1, rd, pass, MO_32);

                genfn(tcg_res, tcg_res, tcg_op1);

                genfn(tcg_res, tcg_op1, tcg_res);

            }



            write_vec_element_i32(s, tcg_res, rd, pass, MO_32);