Commit d028d02d authored by Mathieu Sonet's avatar Mathieu Sonet Committed by Andrzej Zaborowski
Browse files

Add AACI audio playback support to the ARM Versatile/PB platform 



This driver emulates the ARM AACI interface (PL041) connected to a LM4549 codec.
It enables audio playback for the Versatile/PB platform.

Limitations:
- Supports only a playback on one channel (Versatile/Vexpress)
- Supports only one TX FIFO in compact-mode or non-compact mode.
- Supports playback of 12, 16, 18 and 20 bits samples.
- Record is not supported.
- The PL041 is hardwired to a LM4549 codec.

Versatile/PB test build:
linux-2.6.38.5
buildroot-2010.11
alsa-lib-1.0.22
alsa-utils-1.0.22
mpg123-0.66

Qemu host: Ubuntu 10.04 in Vmware/OS X

Playback tested successfully with speaker-test/aplay/mpg123.

Signed-off-by: default avatarMathieu Sonet <contact@elasticsheep.com>
[Peter Maydell: fixed typo in code clearing SL1RXBUSY/SL2RXBUSY
 bits, as spotted by Andrzej Zaborowski]
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarAndrzej Zaborowski <andrew.zaborowski@intel.com>
parent 375847a6

Makefile.target

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@@ -362,6 +362,7 @@ obj-arm-y += syborg_virtio.o 
obj-arm-y += vexpress.o

obj-arm-y += strongarm.o

obj-arm-y += collie.o

obj-arm-y += pl041.o lm4549.o



obj-sh4-y = shix.o r2d.o sh7750.o sh7750_regnames.o tc58128.o

obj-sh4-y += sh_timer.o sh_serial.o sh_intc.o sh_pci.o sm501.o

hw/lm4549.c

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/*

 * LM4549 Audio Codec Interface

 *

 * Copyright (c) 2011

 * Written by Mathieu Sonet - www.elasticsheep.com

 *

 * This code is licenced under the GPL.

 *

 * *****************************************************************

 *

 * This driver emulates the LM4549 codec.

 *

 * It supports only one playback voice and no record voice.

 */



#include "hw.h"

#include "audio/audio.h"

#include "lm4549.h"



#if 0

#define LM4549_DEBUG  1

#endif



#if 0

#define LM4549_DUMP_DAC_INPUT 1

#endif



#ifdef LM4549_DEBUG

#define DPRINTF(fmt, ...) \

do { printf("lm4549: " fmt , ## __VA_ARGS__); } while (0)

#else

#define DPRINTF(fmt, ...) do {} while (0)

#endif



#if defined(LM4549_DUMP_DAC_INPUT)

#include <stdio.h>

static FILE *fp_dac_input;

#endif



/* LM4549 register list */

enum {

    LM4549_Reset                    = 0x00,

    LM4549_Master_Volume            = 0x02,

    LM4549_Line_Out_Volume          = 0x04,

    LM4549_Master_Volume_Mono       = 0x06,

    LM4549_PC_Beep_Volume           = 0x0A,

    LM4549_Phone_Volume             = 0x0C,

    LM4549_Mic_Volume               = 0x0E,

    LM4549_Line_In_Volume           = 0x10,

    LM4549_CD_Volume                = 0x12,

    LM4549_Video_Volume             = 0x14,

    LM4549_Aux_Volume               = 0x16,

    LM4549_PCM_Out_Volume           = 0x18,

    LM4549_Record_Select            = 0x1A,

    LM4549_Record_Gain              = 0x1C,

    LM4549_General_Purpose          = 0x20,

    LM4549_3D_Control               = 0x22,

    LM4549_Powerdown_Ctrl_Stat      = 0x26,

    LM4549_Ext_Audio_ID             = 0x28,

    LM4549_Ext_Audio_Stat_Ctrl      = 0x2A,

    LM4549_PCM_Front_DAC_Rate       = 0x2C,

    LM4549_PCM_ADC_Rate             = 0x32,

    LM4549_Vendor_ID1               = 0x7C,

    LM4549_Vendor_ID2               = 0x7E

};



static void lm4549_reset(lm4549_state *s)

{

    uint16_t *regfile = s->regfile;



    regfile[LM4549_Reset]               = 0x0d50;

    regfile[LM4549_Master_Volume]       = 0x8008;

    regfile[LM4549_Line_Out_Volume]     = 0x8000;

    regfile[LM4549_Master_Volume_Mono]  = 0x8000;

    regfile[LM4549_PC_Beep_Volume]      = 0x0000;

    regfile[LM4549_Phone_Volume]        = 0x8008;

    regfile[LM4549_Mic_Volume]          = 0x8008;

    regfile[LM4549_Line_In_Volume]      = 0x8808;

    regfile[LM4549_CD_Volume]           = 0x8808;

    regfile[LM4549_Video_Volume]        = 0x8808;

    regfile[LM4549_Aux_Volume]          = 0x8808;

    regfile[LM4549_PCM_Out_Volume]      = 0x8808;

    regfile[LM4549_Record_Select]       = 0x0000;

    regfile[LM4549_Record_Gain]         = 0x8000;

    regfile[LM4549_General_Purpose]     = 0x0000;

    regfile[LM4549_3D_Control]          = 0x0101;

    regfile[LM4549_Powerdown_Ctrl_Stat] = 0x000f;

    regfile[LM4549_Ext_Audio_ID]        = 0x0001;

    regfile[LM4549_Ext_Audio_Stat_Ctrl] = 0x0000;

    regfile[LM4549_PCM_Front_DAC_Rate]  = 0xbb80;

    regfile[LM4549_PCM_ADC_Rate]        = 0xbb80;

    regfile[LM4549_Vendor_ID1]          = 0x4e53;

    regfile[LM4549_Vendor_ID2]          = 0x4331;

}



static void lm4549_audio_transfer(lm4549_state *s)

{

    uint32_t written_bytes, written_samples;

    uint32_t i;



    /* Activate the voice */

    AUD_set_active_out(s->voice, 1);

    s->voice_is_active = 1;



    /* Try to write the buffer content */

    written_bytes = AUD_write(s->voice, s->buffer,

                              s->buffer_level * sizeof(uint16_t));

    written_samples = written_bytes >> 1;



#if defined(LM4549_DUMP_DAC_INPUT)

    fwrite(s->buffer, sizeof(uint8_t), written_bytes, fp_dac_input);

#endif



    s->buffer_level -= written_samples;



    if (s->buffer_level > 0) {

        /* Move the data back to the start of the buffer */

        for (i = 0; i < s->buffer_level; i++) {

            s->buffer[i] = s->buffer[i + written_samples];

        }

    }

}



static void lm4549_audio_out_callback(void *opaque, int free)

{

    lm4549_state *s = (lm4549_state *)opaque;

    static uint32_t prev_buffer_level;



#ifdef LM4549_DEBUG

    int size = AUD_get_buffer_size_out(s->voice);

    DPRINTF("audio_out_callback size = %i free = %i\n", size, free);

#endif



    /* Detect that no data are consumed

       => disable the voice */

    if (s->buffer_level == prev_buffer_level) {

        AUD_set_active_out(s->voice, 0);

        s->voice_is_active = 0;

    }

    prev_buffer_level = s->buffer_level;



    /* Check if a buffer transfer is pending */

    if (s->buffer_level == LM4549_BUFFER_SIZE) {

        lm4549_audio_transfer(s);



        /* Request more data */

        if (s->data_req_cb != NULL) {

            (s->data_req_cb)(s->opaque);

        }

    }

}



uint32_t lm4549_read(lm4549_state *s, target_phys_addr_t offset)

{

    uint16_t *regfile = s->regfile;

    uint32_t value = 0;



    /* Read the stored value */

    assert(offset < 128);

    value = regfile[offset];



    DPRINTF("read [0x%02x] = 0x%04x\n", offset, value);



    return value;

}



void lm4549_write(lm4549_state *s,

                  target_phys_addr_t offset, uint32_t value)

{

    uint16_t *regfile = s->regfile;



    assert(offset < 128);

    DPRINTF("write [0x%02x] = 0x%04x\n", offset, value);



    switch (offset) {

    case LM4549_Reset:

        lm4549_reset(s);

        break;



    case LM4549_PCM_Front_DAC_Rate:

        regfile[LM4549_PCM_Front_DAC_Rate] = value;

        DPRINTF("DAC rate change = %i\n", value);



        /* Re-open a voice with the new sample rate */

        struct audsettings as;

        as.freq = value;

        as.nchannels = 2;

        as.fmt = AUD_FMT_S16;

        as.endianness = 0;



        s->voice = AUD_open_out(

            &s->card,

            s->voice,

            "lm4549.out",

            s,

            lm4549_audio_out_callback,

            &as

        );

        break;



    case LM4549_Powerdown_Ctrl_Stat:

        value &= ~0xf;

        value |= regfile[LM4549_Powerdown_Ctrl_Stat] & 0xf;

        regfile[LM4549_Powerdown_Ctrl_Stat] = value;

        break;



    case LM4549_Ext_Audio_ID:

    case LM4549_Vendor_ID1:

    case LM4549_Vendor_ID2:

        DPRINTF("Write to read-only register 0x%x\n", (int)offset);

        break;



    default:

        /* Store the new value */

        regfile[offset] = value;

        break;

    }

}



uint32_t lm4549_write_samples(lm4549_state *s, uint32_t left, uint32_t right)

{

    /* The left and right samples are in 20-bit resolution.

       The LM4549 has 18-bit resolution and only uses the bits [19:2].

       This model supports 16-bit playback.

    */



    if (s->buffer_level >= LM4549_BUFFER_SIZE) {

        DPRINTF("write_sample Buffer full\n");

        return 0;

    }



    /* Store 16-bit samples in the buffer */

    s->buffer[s->buffer_level++] = (left >> 4);

    s->buffer[s->buffer_level++] = (right >> 4);



    if (s->buffer_level == LM4549_BUFFER_SIZE) {

        /* Trigger the transfer of the buffer to the audio host */

        lm4549_audio_transfer(s);

    }



    return 1;

}



static int lm4549_post_load(void *opaque, int version_id)

{

    lm4549_state *s = (lm4549_state *)opaque;

    uint16_t *regfile = s->regfile;



    /* Re-open a voice with the current sample rate */

    uint32_t freq = regfile[LM4549_PCM_Front_DAC_Rate];



    DPRINTF("post_load freq = %i\n", freq);

    DPRINTF("post_load voice_is_active = %i\n", s->voice_is_active);



    struct audsettings as;

    as.freq = freq;

    as.nchannels = 2;

    as.fmt = AUD_FMT_S16;

    as.endianness = 0;



    s->voice = AUD_open_out(

        &s->card,

        s->voice,

        "lm4549.out",

        s,

        lm4549_audio_out_callback,

        &as

    );



    /* Request data */

    if (s->voice_is_active == 1) {

        lm4549_audio_out_callback(s, AUD_get_buffer_size_out(s->voice));

    }



    return 0;

}



void lm4549_init(lm4549_state *s, lm4549_callback data_req_cb, void* opaque)

{

    struct audsettings as;



    /* Store the callback and opaque pointer */

    s->data_req_cb = data_req_cb;

    s->opaque = opaque;



    /* Init the registers */

    lm4549_reset(s);



    /* Register an audio card */

    AUD_register_card("lm4549", &s->card);



    /* Open a default voice */

    as.freq = 48000;

    as.nchannels = 2;

    as.fmt = AUD_FMT_S16;

    as.endianness = 0;



    s->voice = AUD_open_out(

        &s->card,

        s->voice,

        "lm4549.out",

        s,

        lm4549_audio_out_callback,

        &as

    );



    AUD_set_volume_out(s->voice, 0, 255, 255);



    s->voice_is_active = 0;



    /* Reset the input buffer */

    memset(s->buffer, 0x00, sizeof(s->buffer));

    s->buffer_level = 0;



#if defined(LM4549_DUMP_DAC_INPUT)

    fp_dac_input = fopen("lm4549_dac_input.pcm", "wb");

    if (!fp_dac_input) {

        hw_error("Unable to open lm4549_dac_input.pcm for writing\n");

    }

#endif

}



const VMStateDescription vmstate_lm4549_state = {

    .name = "lm4549_state",

    .version_id = 1,

    .minimum_version_id = 1,

    .minimum_version_id_old = 1,

    .post_load = &lm4549_post_load,

    .fields      = (VMStateField[]) {

        VMSTATE_UINT32(voice_is_active, lm4549_state),

        VMSTATE_UINT16_ARRAY(regfile, lm4549_state, 128),

        VMSTATE_UINT16_ARRAY(buffer, lm4549_state, LM4549_BUFFER_SIZE),

        VMSTATE_UINT32(buffer_level, lm4549_state),

        VMSTATE_END_OF_LIST()

    }

};

hw/lm4549.h

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/*

 * LM4549 Audio Codec Interface

 *

 * Copyright (c) 2011

 * Written by Mathieu Sonet - www.elasticsheep.com

 *

 * This code is licenced under the GPL.

 *

 * *****************************************************************

 */



#ifndef HW_LM4549_H

#define HW_LM4549_H



#include "audio/audio.h"



typedef void (*lm4549_callback)(void *opaque);



#define LM4549_BUFFER_SIZE (512 * 2) /* 512 16-bit stereo samples */





typedef struct {

    QEMUSoundCard card;

    SWVoiceOut *voice;

    uint32_t voice_is_active;



    uint16_t regfile[128];

    lm4549_callback data_req_cb;

    void *opaque;



    uint16_t buffer[LM4549_BUFFER_SIZE];

    uint32_t buffer_level;

} lm4549_state;



extern const VMStateDescription vmstate_lm4549_state;





void lm4549_init(lm4549_state *s, lm4549_callback data_req, void *opaque);

uint32_t lm4549_read(lm4549_state *s, target_phys_addr_t offset);

void lm4549_write(lm4549_state *s, target_phys_addr_t offset, uint32_t value);

uint32_t lm4549_write_samples(lm4549_state *s, uint32_t left, uint32_t right);



#endif /* #ifndef HW_LM4549_H */

hw/pl041.c

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hw/pl041.h

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/*

 * Arm PrimeCell PL041 Advanced Audio Codec Interface

 *

 * Copyright (c) 2011

 * Written by Mathieu Sonet - www.elasticsheep.com

 *

 * This code is licenced under the GPL.

 *

 * *****************************************************************

 */



#ifndef HW_PL041_H

#define HW_PL041_H



/* Register file */

#define REGISTER(name, offset) uint32_t name;

typedef struct {

    #include "pl041.hx"

} pl041_regfile;

#undef REGISTER



/* Register addresses */

#define REGISTER(name, offset) PL041_##name = offset,

enum {

    #include "pl041.hx"



    PL041_periphid0 = 0xFE0,

    PL041_periphid1 = 0xFE4,

    PL041_periphid2 = 0xFE8,

    PL041_periphid3 = 0xFEC,

    PL041_pcellid0  = 0xFF0,

    PL041_pcellid1  = 0xFF4,

    PL041_pcellid2  = 0xFF8,

    PL041_pcellid3  = 0xFFC,

};

#undef REGISTER



/* Register bits */



/* IEx */

#define TXCIE           (1 << 0)

#define RXTIE           (1 << 1)

#define TXIE            (1 << 2)

#define RXIE            (1 << 3)

#define RXOIE           (1 << 4)

#define TXUIE           (1 << 5)

#define RXTOIE          (1 << 6)



/* TXCRx */

#define TXEN            (1 << 0)

#define TXSLOT1         (1 << 1)

#define TXSLOT2         (1 << 2)

#define TXSLOT3         (1 << 3)

#define TXSLOT4         (1 << 4)

#define TXCOMPACT       (1 << 15)

#define TXFEN           (1 << 16)



#define TXSLOT_MASK_BIT (1)

#define TXSLOT_MASK     (0xFFF << TXSLOT_MASK_BIT)



#define TSIZE_MASK_BIT  (13)

#define TSIZE_MASK      (0x3 << TSIZE_MASK_BIT)



#define TSIZE_16BITS    (0x0 << TSIZE_MASK_BIT)

#define TSIZE_18BITS    (0x1 << TSIZE_MASK_BIT)

#define TSIZE_20BITS    (0x2 << TSIZE_MASK_BIT)

#define TSIZE_12BITS    (0x3 << TSIZE_MASK_BIT)



/* SRx */

#define RXFE         (1 << 0)

#define TXFE         (1 << 1)

#define RXHF         (1 << 2)

#define TXHE         (1 << 3)

#define RXFF         (1 << 4)

#define TXFF         (1 << 5)

#define RXBUSY       (1 << 6)

#define TXBUSY       (1 << 7)

#define RXOVERRUN    (1 << 8)

#define TXUNDERRUN   (1 << 9)

#define RXTIMEOUT    (1 << 10)

#define RXTOFE       (1 << 11)



/* ISRx */

#define TXCINTR      (1 << 0)

#define RXTOINTR     (1 << 1)

#define TXINTR       (1 << 2)

#define RXINTR       (1 << 3)

#define ORINTR       (1 << 4)

#define URINTR       (1 << 5)

#define RXTOFEINTR   (1 << 6)



/* SLFR */

#define SL1RXBUSY    (1 << 0)

#define SL1TXBUSY    (1 << 1)

#define SL2RXBUSY    (1 << 2)

#define SL2TXBUSY    (1 << 3)

#define SL12RXBUSY   (1 << 4)

#define SL12TXBUSY   (1 << 5)

#define SL1RXVALID   (1 << 6)

#define SL1TXEMPTY   (1 << 7)

#define SL2RXVALID   (1 << 8)

#define SL2TXEMPTY   (1 << 9)

#define SL12RXVALID  (1 << 10)

#define SL12TXEMPTY  (1 << 11)

#define RAWGPIOINT   (1 << 12)

#define RWIS         (1 << 13)



/* MAINCR */

#define AACIFE       (1 << 0)

#define LOOPBACK     (1 << 1)

#define LOWPOWER     (1 << 2)

#define SL1RXEN      (1 << 3)

#define SL1TXEN      (1 << 4)

#define SL2RXEN      (1 << 5)

#define SL2TXEN      (1 << 6)

#define SL12RXEN     (1 << 7)

#define SL12TXEN     (1 << 8)

#define DMAENABLE    (1 << 9)



/* INTCLR */

#define WISC         (1 << 0)

#define RXOEC1       (1 << 1)

#define RXOEC2       (1 << 2)

#define RXOEC3       (1 << 3)

#define RXOEC4       (1 << 4)

#define TXUEC1       (1 << 5)

#define TXUEC2       (1 << 6)

#define TXUEC3       (1 << 7)

#define TXUEC4       (1 << 8)

#define RXTOFEC1     (1 << 9)

#define RXTOFEC2     (1 << 10)

#define RXTOFEC3     (1 << 11)

#define RXTOFEC4     (1 << 12)



#endif /* #ifndef HW_PL041_H */