Commit cf7beda5 authored by Christophe Lyon's avatar Christophe Lyon Committed by Peter Maydell
Browse files

target/arm: Add support for cortex-m7 CPU 



This is derived from cortex-m4 description, adding DP support and FPv5
instructions with the corresponding flags in isar and mvfr2.

Checked that it could successfully execute
vrinta.f32 s15, s15
while cortex-m4 emulation rejects it with "illegal instruction".

Signed-off-by: default avatarChristophe Lyon <christophe.lyon@linaro.org>
Reviewed-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Message-id: 20191025090841.10299-1-christophe.lyon@linaro.org
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 084a398b

target/arm/cpu.c

+33 −0
Original line number Diff line number Diff line
@@ -1975,6 +1975,37 @@ static void cortex_m4_initfn(Object *obj) 
    cpu->isar.id_isar6 = 0x00000000;

}



static void cortex_m7_initfn(Object *obj)

{

    ARMCPU *cpu = ARM_CPU(obj);



    set_feature(&cpu->env, ARM_FEATURE_V7);

    set_feature(&cpu->env, ARM_FEATURE_M);

    set_feature(&cpu->env, ARM_FEATURE_M_MAIN);

    set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP);

    set_feature(&cpu->env, ARM_FEATURE_VFP4);

    cpu->midr = 0x411fc272; /* r1p2 */

    cpu->pmsav7_dregion = 8;

    cpu->isar.mvfr0 = 0x10110221;

    cpu->isar.mvfr1 = 0x12000011;

    cpu->isar.mvfr2 = 0x00000040;

    cpu->id_pfr0 = 0x00000030;

    cpu->id_pfr1 = 0x00000200;

    cpu->id_dfr0 = 0x00100000;

    cpu->id_afr0 = 0x00000000;

    cpu->id_mmfr0 = 0x00100030;

    cpu->id_mmfr1 = 0x00000000;

    cpu->id_mmfr2 = 0x01000000;

    cpu->id_mmfr3 = 0x00000000;

    cpu->isar.id_isar0 = 0x01101110;

    cpu->isar.id_isar1 = 0x02112000;

    cpu->isar.id_isar2 = 0x20232231;

    cpu->isar.id_isar3 = 0x01111131;

    cpu->isar.id_isar4 = 0x01310132;

    cpu->isar.id_isar5 = 0x00000000;

    cpu->isar.id_isar6 = 0x00000000;

}



static void cortex_m33_initfn(Object *obj)

{

    ARMCPU *cpu = ARM_CPU(obj);
@@ -2559,6 +2590,8 @@ static const ARMCPUInfo arm_cpus[] = { 
                             .class_init = arm_v7m_class_init },

    { .name = "cortex-m4",   .initfn = cortex_m4_initfn,

                             .class_init = arm_v7m_class_init },

    { .name = "cortex-m7",   .initfn = cortex_m7_initfn,

                             .class_init = arm_v7m_class_init },

    { .name = "cortex-m33",  .initfn = cortex_m33_initfn,

                             .class_init = arm_v7m_class_init },

    { .name = "cortex-r5",   .initfn = cortex_r5_initfn },