Commit cef9ee70 authored by Sergey Sorokin's avatar Sergey Sorokin Committed by Peter Maydell
Browse files

target-arm: Fix default_exception_el() function for the case when EL3 is not supported 



If EL3 is not supported in current configuration,
we should not try to get EL3 bitness.

Signed-off-by: default avatarSergey Sorokin <afarallax@yandex.ru>
Message-id: 1441208342-10601-2-git-send-email-afarallax@yandex.ru
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 0e21f183

target-arm/translate-a64.c

+5 −1
Original line number Diff line number Diff line
@@ -10966,7 +10966,11 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, 
    dc->condjmp = 0;



    dc->aarch64 = 1;

    dc->el3_is_aa64 = arm_el_is_aa64(env, 3);

    /* If we are coming from secure EL0 in a system with a 32-bit EL3, then

     * there is no secure EL1, so we route exceptions to EL3.

     */

    dc->secure_routed_to_el3 = arm_feature(env, ARM_FEATURE_EL3) &&

                               !arm_el_is_aa64(env, 3);

    dc->thumb = 0;

    dc->bswap_code = 0;

    dc->condexec_mask = 0;

target-arm/translate.c

+5 −1
Original line number Diff line number Diff line
@@ -11172,7 +11172,11 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu, 
    dc->condjmp = 0;



    dc->aarch64 = 0;

    dc->el3_is_aa64 = arm_el_is_aa64(env, 3);

    /* If we are coming from secure EL0 in a system with a 32-bit EL3, then

     * there is no secure EL1, so we route exceptions to EL3.

     */

    dc->secure_routed_to_el3 = arm_feature(env, ARM_FEATURE_EL3) &&

                               !arm_el_is_aa64(env, 3);

    dc->thumb = ARM_TBFLAG_THUMB(tb->flags);

    dc->bswap_code = ARM_TBFLAG_BSWAP_CODE(tb->flags);

    dc->condexec_mask = (ARM_TBFLAG_CONDEXEC(tb->flags) & 0xf) << 1;

target-arm/translate.h

+3 −2
Original line number Diff line number Diff line
@@ -23,7 +23,8 @@ typedef struct DisasContext { 
    ARMMMUIdx mmu_idx; /* MMU index to use for normal loads/stores */

    bool ns;        /* Use non-secure CPREG bank on access */

    int fp_excp_el; /* FP exception EL or 0 if enabled */

    bool el3_is_aa64;  /* Flag indicating whether EL3 is AArch64 or not */

    /* Flag indicating that exceptions from secure mode are routed to EL3. */

    bool secure_routed_to_el3;

    bool vfp_enabled; /* FP enabled via FPSCR.EN */

    int vec_len;

    int vec_stride;
@@ -84,7 +85,7 @@ static inline int default_exception_el(DisasContext *s) 
     * exceptions can only be routed to ELs above 1, so we target the higher of

     * 1 or the current EL.

     */

    return (s->mmu_idx == ARMMMUIdx_S1SE0 && !s->el3_is_aa64)

    return (s->mmu_idx == ARMMMUIdx_S1SE0 && s->secure_routed_to_el3)

            ? 3 : MAX(1, s->current_el);

}