Commit ced31551 authored by Richard Henderson's avatar Richard Henderson Committed by Peter Maydell
Browse files

target/arm: Adjust aarch64_cpu_dump_state for system mode SVE 



Use the existing helpers to determine if (1) the fpu is enabled,
(2) sve state is enabled, and (3) the current sve vector length.

Tested-by: default avatarLaurent Desnogues <laurent.desnogues@gmail.com>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-id: 20181005175350.30752-6-richard.henderson@linaro.org
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 0ab5953b

target/arm/cpu.h

+4 −0
Original line number Diff line number Diff line
@@ -920,6 +920,10 @@ target_ulong do_arm_semihosting(CPUARMState *env); 
void aarch64_sync_32_to_64(CPUARMState *env);

void aarch64_sync_64_to_32(CPUARMState *env);



int fp_exception_el(CPUARMState *env, int cur_el);

int sve_exception_el(CPUARMState *env, int cur_el);

uint32_t sve_zcr_len_for_el(CPUARMState *env, int el);



static inline bool is_a64(CPUARMState *env)

{

    return env->aarch64;

target/arm/helper.c

+3 −3
Original line number Diff line number Diff line
@@ -4406,7 +4406,7 @@ static const ARMCPRegInfo debug_lpae_cp_reginfo[] = { 
 * take care of raising that exception.

 * C.f. the ARM pseudocode function CheckSVEEnabled.

 */

static int sve_exception_el(CPUARMState *env, int el)

int sve_exception_el(CPUARMState *env, int el)

{

#ifndef CONFIG_USER_ONLY

    if (el <= 1) {
@@ -4464,7 +4464,7 @@ static int sve_exception_el(CPUARMState *env, int el) 
/*

 * Given that SVE is enabled, return the vector length for EL.

 */

static uint32_t sve_zcr_len_for_el(CPUARMState *env, int el)

uint32_t sve_zcr_len_for_el(CPUARMState *env, int el)

{

    ARMCPU *cpu = arm_env_get_cpu(env);

    uint32_t zcr_len = cpu->sve_max_vq - 1;
@@ -12546,7 +12546,7 @@ uint32_t HELPER(crc32c)(uint32_t acc, uint32_t val, uint32_t bytes) 
/* Return the exception level to which FP-disabled exceptions should

 * be taken, or 0 if FP is enabled.

 */

static int fp_exception_el(CPUARMState *env, int cur_el)

int fp_exception_el(CPUARMState *env, int cur_el)

{

#ifndef CONFIG_USER_ONLY

    int fpen;

target/arm/translate-a64.c

+6 −2
Original line number Diff line number Diff line
@@ -166,11 +166,15 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, 
        cpu_fprintf(f, "\n");

        return;

    }

    if (fp_exception_el(env, el) != 0) {

        cpu_fprintf(f, "    FPU disabled\n");

        return;

    }

    cpu_fprintf(f, "     FPCR=%08x FPSR=%08x\n",

                vfp_get_fpcr(env), vfp_get_fpsr(env));



    if (arm_feature(env, ARM_FEATURE_SVE)) {

        int j, zcr_len = env->vfp.zcr_el[1] & 0xf; /* fix for system mode */

    if (arm_feature(env, ARM_FEATURE_SVE) && sve_exception_el(env, el) == 0) {

        int j, zcr_len = sve_zcr_len_for_el(env, el);



        for (i = 0; i <= FFR_PRED_NUM; i++) {

            bool eol;