Commit ce5b3c3d authored by Blue Swirl's avatar Blue Swirl
Browse files

Split icc and xcc flag calculations 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4109 c046a42c-6fe2-441c-8c8c-71466251a162
parent 2f5680ee

target-sparc/translate.c

+181 −135
Original line number Diff line number Diff line
@@ -306,13 +306,17 @@ static inline void gen_mov_reg_C(TCGv reg, TCGv src) 
    tcg_gen_andi_tl(reg, reg, 0x1);

}



static inline void gen_cc_clear(void)

static inline void gen_cc_clear_icc(void)

{

    tcg_gen_movi_i32(cpu_psr, 0);

}



#ifdef TARGET_SPARC64

static inline void gen_cc_clear_xcc(void)

{

    tcg_gen_movi_i32(cpu_xcc, 0);

#endif

}

#endif



/* old op:

    if (!T0)
@@ -320,7 +324,7 @@ static inline void gen_cc_clear(void) 
    if ((int32_t) T0 < 0)

        env->psr |= PSR_NEG;

*/

static inline void gen_cc_NZ(TCGv dst)

static inline void gen_cc_NZ_icc(TCGv dst)

{

    TCGv r_temp;

    int l1, l2;
@@ -336,27 +340,29 @@ static inline void gen_cc_NZ(TCGv dst) 
    tcg_gen_brcond_tl(TCG_COND_GE, r_temp, tcg_const_tl(0), l2);

    tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_NEG);

    gen_set_label(l2);

}



#ifdef TARGET_SPARC64

static inline void gen_cc_NZ_xcc(TCGv dst)

{

        int l3, l4;

    int l1, l2;



        l3 = gen_new_label();

        l4 = gen_new_label();

        tcg_gen_brcond_tl(TCG_COND_NE, dst, tcg_const_tl(0), l3);

    l1 = gen_new_label();

    l2 = gen_new_label();

    tcg_gen_brcond_tl(TCG_COND_NE, dst, tcg_const_tl(0), l1);

    tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_ZERO);

        gen_set_label(l3);

        tcg_gen_brcond_tl(TCG_COND_GE, dst, tcg_const_tl(0), l4);

    gen_set_label(l1);

    tcg_gen_brcond_tl(TCG_COND_GE, dst, tcg_const_tl(0), l2);

    tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_NEG);

        gen_set_label(l4);

    gen_set_label(l2);

}

#endif

}



/* old op:

    if (T0 < src1)

        env->psr |= PSR_CARRY;

*/

static inline void gen_cc_C_add(TCGv dst, TCGv src1)

static inline void gen_cc_C_add_icc(TCGv dst, TCGv src1)

{

    TCGv r_temp;

    int l1;
@@ -367,23 +373,25 @@ static inline void gen_cc_C_add(TCGv dst, TCGv src1) 
    tcg_gen_brcond_tl(TCG_COND_GEU, dst, src1, l1);

    tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_CARRY);

    gen_set_label(l1);

}



#ifdef TARGET_SPARC64

static inline void gen_cc_C_add_xcc(TCGv dst, TCGv src1)

{

        int l2;

    int l1;



        l2 = gen_new_label();

        tcg_gen_brcond_tl(TCG_COND_GEU, dst, src1, l2);

    l1 = gen_new_label();

    tcg_gen_brcond_tl(TCG_COND_GEU, dst, src1, l1);

    tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_CARRY);

        gen_set_label(l2);

    gen_set_label(l1);

}

#endif

}



/* old op:

    if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31))

        env->psr |= PSR_OVF;

*/

static inline void gen_cc_V_add(TCGv dst, TCGv src1, TCGv src2)

static inline void gen_cc_V_add_icc(TCGv dst, TCGv src1, TCGv src2)

{

    TCGv r_temp;

    int l1;
@@ -399,23 +407,27 @@ static inline void gen_cc_V_add(TCGv dst, TCGv src1, TCGv src2) 
    tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1);

    tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF);

    gen_set_label(l1);

}



#ifdef TARGET_SPARC64

static inline void gen_cc_V_add_xcc(TCGv dst, TCGv src1, TCGv src2)

{

        int l2;

    TCGv r_temp;

    int l1;



        l2 = gen_new_label();

    l1 = gen_new_label();



    r_temp = tcg_temp_new(TCG_TYPE_TL);

    tcg_gen_xor_tl(r_temp, src1, src2);

    tcg_gen_xori_tl(r_temp, r_temp, -1);

    tcg_gen_xor_tl(cpu_tmp0, src1, dst);

    tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);

    tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 63));

        tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l2);

    tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1);

    tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_OVF);

        gen_set_label(l2);

    gen_set_label(l1);

}

#endif

    tcg_gen_discard_tl(r_temp);

}



static inline void gen_add_tv(TCGv dst, TCGv src1, TCGv src2)

{
@@ -433,22 +445,6 @@ static inline void gen_add_tv(TCGv dst, TCGv src1, TCGv src2) 
    tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1);

    tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_TOVF));

    gen_set_label(l1);

#ifdef TARGET_SPARC64

    {

        int l2;



        l2 = gen_new_label();

        tcg_gen_xor_tl(r_temp, src1, src2);

        tcg_gen_xori_tl(r_temp, r_temp, -1);

        tcg_gen_xor_tl(cpu_tmp0, src1, dst);

        tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);

        tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 63));

        tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l2);

        tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_TOVF));

        gen_set_label(l2);

    }

#endif

    tcg_gen_discard_tl(r_temp);

}



static inline void gen_cc_V_tag(TCGv src1, TCGv src2)
@@ -479,10 +475,16 @@ static inline void gen_op_add_T1_T0_cc(void) 
{

    tcg_gen_mov_tl(cpu_cc_src, cpu_T[0]);

    tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);

    gen_cc_clear();

    gen_cc_NZ(cpu_T[0]);

    gen_cc_C_add(cpu_T[0], cpu_cc_src);

    gen_cc_V_add(cpu_T[0], cpu_cc_src, cpu_T[1]);

    gen_cc_clear_icc();

    gen_cc_NZ_icc(cpu_T[0]);

    gen_cc_C_add_icc(cpu_T[0], cpu_cc_src);

    gen_cc_V_add_icc(cpu_T[0], cpu_cc_src, cpu_T[1]);

#ifdef TARGET_SPARC64

    gen_cc_clear_xcc();

    gen_cc_NZ_xcc(cpu_T[0]);

    gen_cc_C_add_xcc(cpu_T[0], cpu_cc_src);

    gen_cc_V_add_xcc(cpu_T[0], cpu_cc_src, cpu_T[1]);

#endif

}



static inline void gen_op_addx_T1_T0_cc(void)
@@ -490,23 +492,38 @@ static inline void gen_op_addx_T1_T0_cc(void) 
    tcg_gen_mov_tl(cpu_cc_src, cpu_T[0]);

    gen_mov_reg_C(cpu_tmp0, cpu_psr);

    tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_tmp0);

    gen_cc_clear();

    gen_cc_C_add(cpu_T[0], cpu_cc_src);

    gen_cc_clear_icc();

    gen_cc_C_add_icc(cpu_T[0], cpu_cc_src);

#ifdef TARGET_SPARC64

    gen_cc_clear_xcc();

    gen_cc_C_add_xcc(cpu_T[0], cpu_cc_src);

#endif

    tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);

    gen_cc_C_add(cpu_T[0], cpu_cc_src);

    gen_cc_NZ(cpu_T[0]);

    gen_cc_V_add(cpu_T[0], cpu_cc_src, cpu_T[1]);

    gen_cc_NZ_icc(cpu_T[0]);

    gen_cc_C_add_icc(cpu_T[0], cpu_cc_src);

    gen_cc_V_add_icc(cpu_T[0], cpu_cc_src, cpu_T[1]);

#ifdef TARGET_SPARC64

    gen_cc_NZ_xcc(cpu_T[0]);

    gen_cc_C_add_xcc(cpu_T[0], cpu_cc_src);

    gen_cc_V_add_xcc(cpu_T[0], cpu_cc_src, cpu_T[1]);

#endif

}



static inline void gen_op_tadd_T1_T0_cc(void)

{

    tcg_gen_mov_tl(cpu_cc_src, cpu_T[0]);

    tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);

    gen_cc_clear();

    gen_cc_NZ(cpu_T[0]);

    gen_cc_C_add(cpu_T[0], cpu_cc_src);

    gen_cc_V_add(cpu_T[0], cpu_cc_src, cpu_T[1]);

    gen_cc_clear_icc();

    gen_cc_NZ_icc(cpu_T[0]);

    gen_cc_C_add_icc(cpu_T[0], cpu_cc_src);

    gen_cc_V_add_icc(cpu_T[0], cpu_cc_src, cpu_T[1]);

    gen_cc_V_tag(cpu_cc_src, cpu_T[1]);

#ifdef TARGET_SPARC64

    gen_cc_clear_xcc();

    gen_cc_NZ_xcc(cpu_T[0]);

    gen_cc_C_add_xcc(cpu_T[0], cpu_cc_src);

    gen_cc_V_add_xcc(cpu_T[0], cpu_cc_src, cpu_T[1]);

#endif

}



static inline void gen_op_tadd_T1_T0_ccTV(void)
@@ -515,16 +532,22 @@ static inline void gen_op_tadd_T1_T0_ccTV(void) 
    tcg_gen_mov_tl(cpu_cc_src, cpu_T[0]);

    tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);

    gen_add_tv(cpu_T[0], cpu_cc_src, cpu_T[1]);

    gen_cc_clear();

    gen_cc_NZ(cpu_T[0]);

    gen_cc_C_add(cpu_T[0], cpu_cc_src);

    gen_cc_clear_icc();

    gen_cc_NZ_icc(cpu_T[0]);

    gen_cc_C_add_icc(cpu_T[0], cpu_cc_src);

#ifdef TARGET_SPARC64

    gen_cc_clear_xcc();

    gen_cc_NZ_xcc(cpu_T[0]);

    gen_cc_C_add_xcc(cpu_T[0], cpu_cc_src);

    gen_cc_V_add_xcc(cpu_T[0], cpu_cc_src, cpu_T[1]);

#endif

}



/* old op:

    if (src1 < T1)

        env->psr |= PSR_CARRY;

*/

static inline void gen_cc_C_sub(TCGv src1, TCGv src2)

static inline void gen_cc_C_sub_icc(TCGv src1, TCGv src2)

{

    TCGv r_temp1, r_temp2;

    int l1;
@@ -537,23 +560,25 @@ static inline void gen_cc_C_sub(TCGv src1, TCGv src2) 
    tcg_gen_brcond_tl(TCG_COND_GEU, r_temp1, r_temp2, l1);

    tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_CARRY);

    gen_set_label(l1);

}



#ifdef TARGET_SPARC64

static inline void gen_cc_C_sub_xcc(TCGv src1, TCGv src2)

{

        int l2;

    int l1;



        l2 = gen_new_label();

        tcg_gen_brcond_tl(TCG_COND_GEU, src1, src2, l2);

    l1 = gen_new_label();

    tcg_gen_brcond_tl(TCG_COND_GEU, src1, src2, l1);

    tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_CARRY);

        gen_set_label(l2);

    gen_set_label(l1);

}

#endif

}



/* old op:

    if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31))

        env->psr |= PSR_OVF;

*/

static inline void gen_cc_V_sub(TCGv dst, TCGv src1, TCGv src2)

static inline void gen_cc_V_sub_icc(TCGv dst, TCGv src1, TCGv src2)

{

    TCGv r_temp;

    int l1;
@@ -568,22 +593,26 @@ static inline void gen_cc_V_sub(TCGv dst, TCGv src1, TCGv src2) 
    tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1);

    tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF);

    gen_set_label(l1);

}



#ifdef TARGET_SPARC64

static inline void gen_cc_V_sub_xcc(TCGv dst, TCGv src1, TCGv src2)

{

        int l2;

    TCGv r_temp;

    int l1;



        l2 = gen_new_label();

    l1 = gen_new_label();



    r_temp = tcg_temp_new(TCG_TYPE_TL);

    tcg_gen_xor_tl(r_temp, src1, src2);

    tcg_gen_xor_tl(cpu_tmp0, src1, dst);

    tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);

    tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 63));

        tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l2);

    tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1);

    tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_OVF);

        gen_set_label(l2);

    gen_set_label(l1);

}

#endif

    tcg_gen_discard_tl(r_temp);

}



static inline void gen_sub_tv(TCGv dst, TCGv src1, TCGv src2)

{
@@ -600,20 +629,6 @@ static inline void gen_sub_tv(TCGv dst, TCGv src1, TCGv src2) 
    tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1);

    tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_TOVF));

    gen_set_label(l1);

#ifdef TARGET_SPARC64

    {

        int l2;



        l2 = gen_new_label();

        tcg_gen_xor_tl(r_temp, src1, src2);

        tcg_gen_xor_tl(cpu_tmp0, src1, dst);

        tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);

        tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 63));

        tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l2);

        tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_TOVF));

        gen_set_label(l2);

    }

#endif

    tcg_gen_discard_tl(r_temp);

}
@@ -621,10 +636,16 @@ static inline void gen_op_sub_T1_T0_cc(void) 
{

    tcg_gen_mov_tl(cpu_cc_src, cpu_T[0]);

    tcg_gen_sub_tl(cpu_T[0], cpu_T[0], cpu_T[1]);

    gen_cc_clear();

    gen_cc_NZ(cpu_T[0]);

    gen_cc_C_sub(cpu_cc_src, cpu_T[1]);

    gen_cc_V_sub(cpu_T[0], cpu_cc_src, cpu_T[1]);

    gen_cc_clear_icc();

    gen_cc_NZ_icc(cpu_T[0]);

    gen_cc_C_sub_icc(cpu_cc_src, cpu_T[1]);

    gen_cc_V_sub_icc(cpu_T[0], cpu_cc_src, cpu_T[1]);

#ifdef TARGET_SPARC64

    gen_cc_clear_xcc();

    gen_cc_NZ_xcc(cpu_T[0]);

    gen_cc_C_sub_xcc(cpu_cc_src, cpu_T[1]);

    gen_cc_V_sub_xcc(cpu_T[0], cpu_cc_src, cpu_T[1]);

#endif

}



static inline void gen_op_subx_T1_T0_cc(void)
@@ -632,23 +653,38 @@ static inline void gen_op_subx_T1_T0_cc(void) 
    tcg_gen_mov_tl(cpu_cc_src, cpu_T[0]);

    gen_mov_reg_C(cpu_tmp0, cpu_psr);

    tcg_gen_sub_tl(cpu_T[0], cpu_T[0], cpu_tmp0);

    gen_cc_clear();

    gen_cc_C_sub(cpu_T[0], cpu_cc_src);

    gen_cc_clear_icc();

    gen_cc_C_sub_icc(cpu_T[0], cpu_cc_src);

#ifdef TARGET_SPARC64

    gen_cc_clear_xcc();

    gen_cc_C_sub_xcc(cpu_T[0], cpu_cc_src);

#endif

    tcg_gen_sub_tl(cpu_T[0], cpu_T[0], cpu_T[1]);

    gen_cc_C_sub(cpu_T[0], cpu_cc_src);

    gen_cc_NZ(cpu_T[0]);

    gen_cc_V_sub(cpu_T[0], cpu_cc_src, cpu_T[1]);

    gen_cc_NZ_icc(cpu_T[0]);

    gen_cc_C_sub_icc(cpu_T[0], cpu_cc_src);

    gen_cc_V_sub_icc(cpu_T[0], cpu_cc_src, cpu_T[1]);

#ifdef TARGET_SPARC64

    gen_cc_NZ_xcc(cpu_T[0]);

    gen_cc_C_sub_xcc(cpu_T[0], cpu_cc_src);

    gen_cc_V_sub_xcc(cpu_T[0], cpu_cc_src, cpu_T[1]);

#endif

}



static inline void gen_op_tsub_T1_T0_cc(void)

{

    tcg_gen_mov_tl(cpu_cc_src, cpu_T[0]);

    tcg_gen_sub_tl(cpu_T[0], cpu_T[0], cpu_T[1]);

    gen_cc_clear();

    gen_cc_NZ(cpu_T[0]);

    gen_cc_C_sub(cpu_cc_src, cpu_T[1]);

    gen_cc_V_sub(cpu_T[0], cpu_cc_src, cpu_T[1]);

    gen_cc_clear_icc();

    gen_cc_NZ_icc(cpu_T[0]);

    gen_cc_C_sub_icc(cpu_cc_src, cpu_T[1]);

    gen_cc_V_sub_icc(cpu_T[0], cpu_cc_src, cpu_T[1]);

    gen_cc_V_tag(cpu_cc_src, cpu_T[1]);

#ifdef TARGET_SPARC64

    gen_cc_clear_xcc();

    gen_cc_NZ_xcc(cpu_T[0]);

    gen_cc_C_sub_xcc(cpu_cc_src, cpu_T[1]);

    gen_cc_V_sub_xcc(cpu_T[0], cpu_cc_src, cpu_T[1]);

#endif

}



static inline void gen_op_tsub_T1_T0_ccTV(void)
@@ -657,9 +693,15 @@ static inline void gen_op_tsub_T1_T0_ccTV(void) 
    tcg_gen_mov_tl(cpu_cc_src, cpu_T[0]);

    tcg_gen_sub_tl(cpu_T[0], cpu_T[0], cpu_T[1]);

    gen_sub_tv(cpu_T[0], cpu_cc_src, cpu_T[1]);

    gen_cc_clear();

    gen_cc_NZ(cpu_T[0]);

    gen_cc_C_sub(cpu_cc_src, cpu_T[1]);

    gen_cc_clear_icc();

    gen_cc_NZ_icc(cpu_T[0]);

    gen_cc_C_sub_icc(cpu_cc_src, cpu_T[1]);

#ifdef TARGET_SPARC64

    gen_cc_clear_xcc();

    gen_cc_NZ_xcc(cpu_T[0]);

    gen_cc_C_sub_xcc(cpu_cc_src, cpu_T[1]);

    gen_cc_V_sub_xcc(cpu_T[0], cpu_cc_src, cpu_T[1]);

#endif

}



static inline void gen_op_mulscc_T1_T0(void)
@@ -711,10 +753,10 @@ static inline void gen_op_mulscc_T1_T0(void) 
    tcg_gen_add_tl(cpu_T[0], cpu_cc_src, cpu_cc_src2);

    tcg_gen_discard_tl(r_temp);



    gen_cc_clear();

    gen_cc_NZ(cpu_T[0]);

    gen_cc_V_add(cpu_T[0], cpu_cc_src, cpu_cc_src2);

    gen_cc_C_add(cpu_T[0], cpu_cc_src);

    gen_cc_clear_icc();

    gen_cc_NZ_icc(cpu_T[0]);

    gen_cc_V_add_icc(cpu_T[0], cpu_cc_src, cpu_cc_src2);

    gen_cc_C_add_icc(cpu_T[0], cpu_cc_src);

}



static inline void gen_op_umul_T1_T0(void)
@@ -797,8 +839,8 @@ static inline void gen_op_div_cc(void) 
{

    int l1;



    gen_cc_clear();

    gen_cc_NZ(cpu_T[0]);

    gen_cc_clear_icc();

    gen_cc_NZ_icc(cpu_T[0]);

    l1 = gen_new_label();

    tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, cc_src2));

    tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), l1);
@@ -808,8 +850,12 @@ static inline void gen_op_div_cc(void) 


static inline void gen_op_logic_T0_cc(void)

{

    gen_cc_clear();

    gen_cc_NZ(cpu_T[0]);

    gen_cc_clear_icc();

    gen_cc_NZ_icc(cpu_T[0]);

#ifdef TARGET_SPARC64

    gen_cc_clear_xcc();

    gen_cc_NZ_xcc(cpu_T[0]);

#endif

}



// 1