Commit cdf0592c authored by Peter Maydell's avatar Peter Maydell
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Merge remote-tracking branch 'remotes/rth/tcg-v8p-2' into staging 



* remotes/rth/tcg-v8p-2:
  tcg-sparc: Convert to new ldst opcodes
  tcg-sparc: Convert to new ldst helpers
  tcg-sparc: Tidy tcg_out_tlb_load interface
  tcg-sparc: Use TCGMemOp within qemu_ldst routines
  tcg-sparc: Improve tcg_out_movi
  tcg-sparc: Dont handle constant arguments to ext32 ops
  tcg-sparc: Don't handle remainder
  tcg-sparc: Use intptr_t as appropriate
  tcg-sparc: Tidy call+jump patterns
  tcg-sparc: Fix tlb read
  tcg-sparc: Fix ld64 for 32-bit mode

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 87f63962 cab0a7ea

tcg/sparc/tcg-target.c

+301 −298

File changed.

Preview size limit exceeded, changes collapsed.

tcg/sparc/tcg-target.h

+3 −3
Original line number Diff line number Diff line
@@ -94,7 +94,7 @@ typedef enum { 


/* optional instructions */

#define TCG_TARGET_HAS_div_i32		1

#define TCG_TARGET_HAS_rem_i32		1

#define TCG_TARGET_HAS_rem_i32		0

#define TCG_TARGET_HAS_rot_i32          0

#define TCG_TARGET_HAS_ext8s_i32        0

#define TCG_TARGET_HAS_ext16s_i32       0
@@ -120,7 +120,7 @@ typedef enum { 


#if TCG_TARGET_REG_BITS == 64

#define TCG_TARGET_HAS_div_i64          1

#define TCG_TARGET_HAS_rem_i64          1

#define TCG_TARGET_HAS_rem_i64          0

#define TCG_TARGET_HAS_rot_i64          0

#define TCG_TARGET_HAS_ext8s_i64        0

#define TCG_TARGET_HAS_ext16s_i64       0
@@ -148,7 +148,7 @@ typedef enum { 
#define TCG_TARGET_HAS_mulsh_i64        0

#endif



#define TCG_TARGET_HAS_new_ldst         0

#define TCG_TARGET_HAS_new_ldst         1



#define TCG_AREG0 TCG_REG_I0