Commit cdac7a71 authored by Anthony Liguori's avatar Anthony Liguori
Browse files

Merge remote-tracking branch 'rth/auxv-2' into staging 



# By Richard Henderson
# Via Richard Henderson
* rth/auxv-2:
  linux-user: Use qemu_getauxval for AT_EXECFD
  util: Use qemu_getauxval in linux qemu_cache_utils_init
  tcg-s390: Use qemu_getauxval in query_facilities
  tcg-arm: Use qemu_getauxval
  tcg-ppc64: Use qemu_getauxval
  osdep: Create qemu_getauxval and qemu_init_auxval

Message-id: 1385757754-10702-1-git-send-email-rth@twiddle.net
Signed-off-by: default avatarAnthony Liguori <aliguori@amazon.com>
parents a55d121f 0b959cf5

include/elf.h

+73 −0
Original line number Diff line number Diff line
@@ -411,6 +411,65 @@ typedef struct { 
#define R_SPARC_5		44

#define R_SPARC_6		45



/* Bits present in AT_HWCAP for ARM.  */



#define HWCAP_ARM_SWP           (1 << 0)

#define HWCAP_ARM_HALF          (1 << 1)

#define HWCAP_ARM_THUMB         (1 << 2)

#define HWCAP_ARM_26BIT         (1 << 3)

#define HWCAP_ARM_FAST_MULT     (1 << 4)

#define HWCAP_ARM_FPA           (1 << 5)

#define HWCAP_ARM_VFP           (1 << 6)

#define HWCAP_ARM_EDSP          (1 << 7)

#define HWCAP_ARM_JAVA          (1 << 8)

#define HWCAP_ARM_IWMMXT        (1 << 9)

#define HWCAP_ARM_CRUNCH        (1 << 10)

#define HWCAP_ARM_THUMBEE       (1 << 11)

#define HWCAP_ARM_NEON          (1 << 12)

#define HWCAP_ARM_VFPv3         (1 << 13)

#define HWCAP_ARM_VFPv3D16      (1 << 14)       /* also set for VFPv4-D16 */

#define HWCAP_ARM_TLS           (1 << 15)

#define HWCAP_ARM_VFPv4         (1 << 16)

#define HWCAP_ARM_IDIVA         (1 << 17)

#define HWCAP_ARM_IDIVT         (1 << 18)

#define HWCAP_IDIV              (HWCAP_IDIVA | HWCAP_IDIVT)

#define HWCAP_VFPD32            (1 << 19)       /* set if VFP has 32 regs */

#define HWCAP_LPAE              (1 << 20)



/* Bits present in AT_HWCAP for PowerPC.  */



#define PPC_FEATURE_32                  0x80000000

#define PPC_FEATURE_64                  0x40000000

#define PPC_FEATURE_601_INSTR           0x20000000

#define PPC_FEATURE_HAS_ALTIVEC         0x10000000

#define PPC_FEATURE_HAS_FPU             0x08000000

#define PPC_FEATURE_HAS_MMU             0x04000000

#define PPC_FEATURE_HAS_4xxMAC          0x02000000

#define PPC_FEATURE_UNIFIED_CACHE       0x01000000

#define PPC_FEATURE_HAS_SPE             0x00800000

#define PPC_FEATURE_HAS_EFP_SINGLE      0x00400000

#define PPC_FEATURE_HAS_EFP_DOUBLE      0x00200000

#define PPC_FEATURE_NO_TB               0x00100000

#define PPC_FEATURE_POWER4              0x00080000

#define PPC_FEATURE_POWER5              0x00040000

#define PPC_FEATURE_POWER5_PLUS         0x00020000

#define PPC_FEATURE_CELL                0x00010000

#define PPC_FEATURE_BOOKE               0x00008000

#define PPC_FEATURE_SMT                 0x00004000

#define PPC_FEATURE_ICACHE_SNOOP        0x00002000

#define PPC_FEATURE_ARCH_2_05           0x00001000

#define PPC_FEATURE_PA6T                0x00000800

#define PPC_FEATURE_HAS_DFP             0x00000400

#define PPC_FEATURE_POWER6_EXT          0x00000200

#define PPC_FEATURE_ARCH_2_06           0x00000100

#define PPC_FEATURE_HAS_VSX             0x00000080



#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \

                                        0x00000040



#define PPC_FEATURE_TRUE_LE             0x00000002

#define PPC_FEATURE_PPC_LE              0x00000001



/* Bits present in AT_HWCAP, primarily for Sparc32.  */



#define HWCAP_SPARC_FLUSH       1    /* CPU supports flush instruction. */
@@ -420,6 +479,20 @@ typedef struct { 
#define HWCAP_SPARC_V9		16

#define HWCAP_SPARC_ULTRA3	32



/* Bits present in AT_HWCAP for s390.  */



#define HWCAP_S390_ESAN3        1

#define HWCAP_S390_ZARCH        2

#define HWCAP_S390_STFLE        4

#define HWCAP_S390_MSA          8

#define HWCAP_S390_LDISP        16

#define HWCAP_S390_EIMM         32

#define HWCAP_S390_DFP          64

#define HWCAP_S390_HPAGE        128

#define HWCAP_S390_ETF3EH       256

#define HWCAP_S390_HIGH_GPRS    512

#define HWCAP_S390_TE           1024



/*

 * 68k ELF relocation types

 */

include/qemu/cache-utils.h

+2 −2
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ struct qemu_cache_conf { 


extern struct qemu_cache_conf qemu_cache_conf;



void qemu_cache_utils_init(char **envp);

void qemu_cache_utils_init(void);



/* mildly adjusted code from tcg-dyngen.c */

static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
@@ -38,7 +38,7 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop) 
}



#else

#define qemu_cache_utils_init(envp) do { (void) (envp); } while (0)

#define qemu_cache_utils_init() do { } while (0)

#endif



#endif /* QEMU_CACHE_UTILS_H */

include/qemu/osdep.h

+25 −0
Original line number Diff line number Diff line
@@ -215,4 +215,29 @@ bool fips_get_state(void); 
 */

char *qemu_get_local_state_pathname(const char *relative_pathname);



/**

 * qemu_getauxval:

 * @type: the auxiliary vector key to lookup

 *

 * Search the auxiliary vector for @type, returning the value

 * or 0 if @type is not present.

 */

#if defined(CONFIG_GETAUXVAL) || defined(__linux__)

unsigned long qemu_getauxval(unsigned long type);

#else

static inline unsigned long qemu_getauxval(unsigned long type) { return 0; }

#endif



/**

 * qemu_init_auxval:

 * @envp: the third argument to main

 *

 * If supported and required, locate the auxiliary vector at program startup.

 */

#if defined(CONFIG_GETAUXVAL) || !defined(__linux__)

static inline void qemu_init_auxval(char **envp) { }

#else

void qemu_init_auxval(char **envp);

#endif



#endif

linux-user/main.c

+8 −27
Original line number Diff line number Diff line
@@ -3663,26 +3663,6 @@ static int parse_args(int argc, char **argv) 
    return optind;

}



static int get_execfd(char **envp)

{

    typedef struct {

        long a_type;

        long a_val;

    } auxv_t;

    auxv_t *auxv;



    while (*envp++ != NULL) {

        ;

    }



    for (auxv = (auxv_t *)envp; auxv->a_type != AT_NULL; auxv++) {

        if (auxv->a_type == AT_EXECFD) {

            return auxv->a_val;

        }

    }

    return -1;

}



int main(int argc, char **argv, char **envp)

{

    struct target_pt_regs regs1, *regs = &regs1;
@@ -3701,7 +3681,8 @@ int main(int argc, char **argv, char **envp) 


    module_call_init(MODULE_INIT_QOM);



    qemu_cache_utils_init(envp);

    qemu_init_auxval(envp);

    qemu_cache_utils_init();



    if ((envlist = envlist_create()) == NULL) {

        (void) fprintf(stderr, "Unable to allocate envlist\n");
@@ -3875,14 +3856,14 @@ int main(int argc, char **argv, char **envp) 
    env->opaque = ts;

    task_settid(ts);



    execfd = get_execfd(envp);

    if (execfd < 0) {

    execfd = qemu_getauxval(AT_EXECFD);

    if (execfd == 0) {

        execfd = open(filename, O_RDONLY);

    }

        if (execfd < 0) {

        printf("Error while loading %s: %s\n", filename, strerror(-execfd));

            printf("Error while loading %s: %s\n", filename, strerror(errno));

            _exit(1);

        }

    }



    ret = loader_exec(execfd, filename, target_argv, target_environ, regs,

        info, &bprm);

tcg/arm/tcg-target.c

+5 −9
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
 * THE SOFTWARE.

 */



#include "elf.h"

#include "tcg-be-ldst.h"



/* The __ARM_ARCH define is provided by gcc 4.8.  Construct it otherwise.  */
@@ -58,9 +59,6 @@ static int arm_arch = __ARM_ARCH; 
#ifndef use_idiv_instructions

bool use_idiv_instructions;

#endif

#ifdef CONFIG_GETAUXVAL

# include <sys/auxv.h>

#endif



#ifndef NDEBUG

static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
@@ -2036,22 +2034,20 @@ static const TCGTargetOpDef arm_op_defs[] = { 


static void tcg_target_init(TCGContext *s)

{

#if defined(CONFIG_GETAUXVAL)

    /* Only probe for the platform and capabilities if we havn't already

       determined maximum values at compile time.  */

# if !defined(use_idiv_instructions)

#ifndef use_idiv_instructions

    {

        unsigned long hwcap = getauxval(AT_HWCAP);

        unsigned long hwcap = qemu_getauxval(AT_HWCAP);

        use_idiv_instructions = (hwcap & HWCAP_ARM_IDIVA) != 0;

    }

#endif

    if (__ARM_ARCH < 7) {

        const char *pl = (const char *)getauxval(AT_PLATFORM);

        const char *pl = (const char *)qemu_getauxval(AT_PLATFORM);

        if (pl != NULL && pl[0] == 'v' && pl[1] >= '4' && pl[1] <= '9') {

            arm_arch = pl[1] - '0';

        }

    }

#endif /* GETAUXVAL */



    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);

    tcg_regset_set32(tcg_target_call_clobber_regs, 0,