Loading hw/net/ne2000.c +12 −5 Original line number Diff line number Diff line Loading @@ -26,6 +26,7 @@ #include "net/eth.h" #include "ne2000.h" #include "sysemu/sysemu.h" #include "trace.h" /* debug NE2000 card */ //#define DEBUG_NE2000 Loading Loading @@ -662,19 +663,24 @@ static uint64_t ne2000_read(void *opaque, hwaddr addr, unsigned size) { NE2000State *s = opaque; uint64_t val; if (addr < 0x10 && size == 1) { return ne2000_ioport_read(s, addr); val = ne2000_ioport_read(s, addr); } else if (addr == 0x10) { if (size <= 2) { return ne2000_asic_ioport_read(s, addr); val = ne2000_asic_ioport_read(s, addr); } else { return ne2000_asic_ioport_readl(s, addr); val = ne2000_asic_ioport_readl(s, addr); } } else if (addr == 0x1f && size == 1) { return ne2000_reset_ioport_read(s, addr); val = ne2000_reset_ioport_read(s, addr); } else { val = ((uint64_t)1 << (size * 8)) - 1; } return ((uint64_t)1 << (size * 8)) - 1; trace_ne2000_read(addr, val); return val; } static void ne2000_write(void *opaque, hwaddr addr, Loading @@ -682,6 +688,7 @@ static void ne2000_write(void *opaque, hwaddr addr, { NE2000State *s = opaque; trace_ne2000_write(addr, data); if (addr < 0x10 && size == 1) { ne2000_ioport_write(s, addr, data); } else if (addr == 0x10) { Loading hw/net/trace-events +4 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,10 @@ mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x" mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (0x%02x)" # hw/net/ne2000.c ne2000_read(uint64_t addr, uint64_t val) "read addr=0x%" PRIx64 " val=0x%" PRIx64 ne2000_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 # hw/net/opencores_eth.c open_eth_mii_write(unsigned idx, uint16_t v) "MII[0x%02x] <- 0x%04x" open_eth_mii_read(unsigned idx, uint16_t v) "MII[0x%02x] -> 0x%04x" Loading Loading
hw/net/ne2000.c +12 −5 Original line number Diff line number Diff line Loading @@ -26,6 +26,7 @@ #include "net/eth.h" #include "ne2000.h" #include "sysemu/sysemu.h" #include "trace.h" /* debug NE2000 card */ //#define DEBUG_NE2000 Loading Loading @@ -662,19 +663,24 @@ static uint64_t ne2000_read(void *opaque, hwaddr addr, unsigned size) { NE2000State *s = opaque; uint64_t val; if (addr < 0x10 && size == 1) { return ne2000_ioport_read(s, addr); val = ne2000_ioport_read(s, addr); } else if (addr == 0x10) { if (size <= 2) { return ne2000_asic_ioport_read(s, addr); val = ne2000_asic_ioport_read(s, addr); } else { return ne2000_asic_ioport_readl(s, addr); val = ne2000_asic_ioport_readl(s, addr); } } else if (addr == 0x1f && size == 1) { return ne2000_reset_ioport_read(s, addr); val = ne2000_reset_ioport_read(s, addr); } else { val = ((uint64_t)1 << (size * 8)) - 1; } return ((uint64_t)1 << (size * 8)) - 1; trace_ne2000_read(addr, val); return val; } static void ne2000_write(void *opaque, hwaddr addr, Loading @@ -682,6 +688,7 @@ static void ne2000_write(void *opaque, hwaddr addr, { NE2000State *s = opaque; trace_ne2000_write(addr, data); if (addr < 0x10 && size == 1) { ne2000_ioport_write(s, addr, data); } else if (addr == 0x10) { Loading
hw/net/trace-events +4 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,10 @@ mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x" mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (0x%02x)" # hw/net/ne2000.c ne2000_read(uint64_t addr, uint64_t val) "read addr=0x%" PRIx64 " val=0x%" PRIx64 ne2000_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 # hw/net/opencores_eth.c open_eth_mii_write(unsigned idx, uint16_t v) "MII[0x%02x] <- 0x%04x" open_eth_mii_read(unsigned idx, uint16_t v) "MII[0x%02x] -> 0x%04x" Loading