Commit ccc23bb0 authored by Peter Xu's avatar Peter Xu Committed by Michael S. Tsirkin
Browse files

intel_iommu: dma read/write draining support 

Support DMA read/write draining should be easy for existing VT-d
emulation since the emulation itself does not have any request queue
there so we don't need to do anything to flush the un-commited queue.
What we need to do is to declare the support.

These capabilities are required to pass Windows SVVP test program.  It
is verified that when with parameters "x-aw-bits=48,caching-mode=off"
we can pass the Windows SVVP test with this patch applied.  Otherwise
we'll fail with:

        IOMMU[0] - DWD (DMA write draining) not supported
        IOMMU[0] - DWD (DMA read draining) not supported
        Segment 0 has no DMA remapping capable IOMMU units

However since these bits are not declared support for QEMU<=3.1, we'll
need a compatibility bit for it and we turn this on by default only
for QEMU>=4.0.

Please refer to VT-d spec 6.5.4 for more information.

CC: Yu Wang <wyu@redhat.com>
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1654550


Signed-off-by: default avatarPeter Xu <peterx@redhat.com>
Reviewed-by: default avatarMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
parent 095955b2

hw/i386/intel_iommu.c

+4 −0
Original line number Diff line number Diff line
@@ -2659,6 +2659,7 @@ static Property vtd_properties[] = { 
    DEFINE_PROP_UINT8("x-aw-bits", IntelIOMMUState, aw_bits,

                      VTD_HOST_ADDRESS_WIDTH),

    DEFINE_PROP_BOOL("caching-mode", IntelIOMMUState, caching_mode, FALSE),

    DEFINE_PROP_BOOL("dma-drain", IntelIOMMUState, dma_drain, true),

    DEFINE_PROP_END_OF_LIST(),

};
@@ -3147,6 +3148,9 @@ static void vtd_init(IntelIOMMUState *s) 
    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND |

             VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SLLPS |

             VTD_CAP_SAGAW_39bit | VTD_CAP_MGAW(s->aw_bits);

    if (s->dma_drain) {

        s->cap |= VTD_CAP_DRAIN;

    }

    if (s->aw_bits == VTD_HOST_AW_48BIT) {

        s->cap |= VTD_CAP_SAGAW_48bit;

    }

hw/i386/intel_iommu_internal.h

+3 −0
Original line number Diff line number Diff line
@@ -203,6 +203,9 @@ 
#define VTD_CAP_MAMV                (VTD_MAMV << 48)

#define VTD_CAP_PSI                 (1ULL << 39)

#define VTD_CAP_SLLPS               ((1ULL << 34) | (1ULL << 35))

#define VTD_CAP_DRAIN_WRITE         (1ULL << 54)

#define VTD_CAP_DRAIN_READ          (1ULL << 55)

#define VTD_CAP_DRAIN               (VTD_CAP_DRAIN_READ | VTD_CAP_DRAIN_WRITE)

#define VTD_CAP_CM                  (1ULL << 7)



/* Supported Adjusted Guest Address Widths */

include/hw/i386/intel_iommu.h

+1 −0
Original line number Diff line number Diff line
@@ -245,6 +245,7 @@ struct IntelIOMMUState { 
    OnOffAuto intr_eim;             /* Toggle for EIM cabability */

    bool buggy_eim;                 /* Force buggy EIM unless eim=off */

    uint8_t aw_bits;                /* Host/IOVA address width (in bits) */

    bool dma_drain;                 /* Whether DMA r/w draining enabled */



    /*

     * Protects IOMMU states in general.  Currently it protects the

include/hw/i386/pc.h

+5 −0
Original line number Diff line number Diff line
@@ -296,6 +296,11 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 


#define PC_COMPAT_3_1 \

    HW_COMPAT_3_1 \

    {\

        .driver   = "intel-iommu",\

        .property = "dma-drain",\

        .value    = "off",\

    },



#define PC_COMPAT_3_0 \

    HW_COMPAT_3_0 \