Commit cbe3a8c5 authored by Markus Armbruster's avatar Markus Armbruster
Browse files

riscv/sifive_u: Fix sifive_u_soc_realize() error API violations 



The Error ** argument must be NULL, &error_abort, &error_fatal, or a
pointer to a variable containing NULL.  Passing an argument of the
latter kind twice without clearing it in between is wrong: if the
first call sets an error, it no longer points to NULL for the second
call.

sifive_u_soc_realize() is wrong that way: it passes &err to
sysbus_realize() four times before checking it.  Harmless, because the
first three can't actually fail (I think).

Fix by checking for failure right away.

Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: qemu-riscv@nongnu.org
Signed-off-by: default avatarMarkus Armbruster <armbru@redhat.com>
Reviewed-by: default avatarAlistair Francis <alistair.francis@wdc.com>
Message-Id: <20200630090351.1247703-18-armbru@redhat.com>
parent c24d9716

hw/riscv/sifive_u.c

+9 −3
Original line number Diff line number Diff line
@@ -677,11 +677,15 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp) 
        memmap[SIFIVE_U_CLINT].size, ms->smp.cpus,

        SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE, false);



    sysbus_realize(SYS_BUS_DEVICE(&s->prci), &err);

    if (!sysbus_realize(SYS_BUS_DEVICE(&s->prci), errp)) {

        return;

    }

    sysbus_mmio_map(SYS_BUS_DEVICE(&s->prci), 0, memmap[SIFIVE_U_PRCI].base);



    qdev_prop_set_uint32(DEVICE(&s->gpio), "ngpio", 16);

    sysbus_realize(SYS_BUS_DEVICE(&s->gpio), &err);

    if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {

        return;

    }

    sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, memmap[SIFIVE_U_GPIO].base);



    /* Pass all GPIOs to the SOC layer so they are available to the board */
@@ -695,7 +699,9 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp) 
    }



    qdev_prop_set_uint32(DEVICE(&s->otp), "serial", s->serial);

    sysbus_realize(SYS_BUS_DEVICE(&s->otp), &err);

    if (!sysbus_realize(SYS_BUS_DEVICE(&s->otp), errp)) {

        return;

    }

    sysbus_mmio_map(SYS_BUS_DEVICE(&s->otp), 0, memmap[SIFIVE_U_OTP].base);



    if (nd->used) {