Commit cb76e9c7 authored by Blue Swirl's avatar Blue Swirl
Browse files

Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf 

* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf:
  PPC: Fix openpic with relative memregions
  pseries: Configure PCI bridge using properties
  PPC: KVM: Synchronize regs on CPU dump
  kvm: Comparison with ioctl number macros needs to be unsigned
  ppc: Correctly define POWERPC_INSNS2_DEFAULT
  pseries: Add support for level interrupts to XICS
  PPC: Fix large page support in TCG
  PPC: Add PIR register to POWER7 CPU
  pseries: Remove PCI device from PCI host bridge code
  pseries: Remove unused constant from PCI code
  pseries: Update SLOF firmware image
  PPC64: Add support for ldbrx and stdbrx instructions
  pseries: Don't try to munmap() a malloc()ed TCE table
  ppc: Add missing 'static' to spin_rw_ops
  PPC: 405: Fix ppc405ep initialization
  Bad zero comparison for sas_ss_flags on powerpc
parents 1329d189 38ae51a8

hw/openpic.c

+2 −10
Original line number Diff line number Diff line
@@ -713,7 +713,7 @@ static void openpic_timer_write (void *opaque, uint32_t addr, uint32_t val) 
    DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);

    if (addr & 0xF)

        return;

    addr -= 0x1100;

    addr -= 0x10;

    addr &= 0xFFFF;

    idx = (addr & 0xFFF0) >> 6;

    addr = addr & 0x30;
@@ -746,7 +746,7 @@ static uint32_t openpic_timer_read (void *opaque, uint32_t addr) 
    retval = 0xFFFFFFFF;

    if (addr & 0xF)

        return retval;

    addr -= 0x1100;

    addr -= 0x10;

    addr &= 0xFFFF;

    idx = (addr & 0xFFF0) >> 6;

    addr = addr & 0x30;
@@ -1361,7 +1361,6 @@ static void mpic_src_ext_write (void *opaque, target_phys_addr_t addr, 
    if (addr & 0xF)

        return;



    addr -= MPIC_EXT_REG_START & (OPENPIC_PAGE_SIZE - 1);

    if (addr < MPIC_EXT_REG_SIZE) {

        idx += (addr & 0xFFF0) >> 5;

        if (addr & 0x10) {
@@ -1385,7 +1384,6 @@ static uint32_t mpic_src_ext_read (void *opaque, target_phys_addr_t addr) 
    if (addr & 0xF)

        return retval;



    addr -= MPIC_EXT_REG_START & (OPENPIC_PAGE_SIZE - 1);

    if (addr < MPIC_EXT_REG_SIZE) {

        idx += (addr & 0xFFF0) >> 5;

        if (addr & 0x10) {
@@ -1411,7 +1409,6 @@ static void mpic_src_int_write (void *opaque, target_phys_addr_t addr, 
    if (addr & 0xF)

        return;



    addr -= MPIC_INT_REG_START & (OPENPIC_PAGE_SIZE - 1);

    if (addr < MPIC_INT_REG_SIZE) {

        idx += (addr & 0xFFF0) >> 5;

        if (addr & 0x10) {
@@ -1435,7 +1432,6 @@ static uint32_t mpic_src_int_read (void *opaque, target_phys_addr_t addr) 
    if (addr & 0xF)

        return retval;



    addr -= MPIC_INT_REG_START & (OPENPIC_PAGE_SIZE - 1);

    if (addr < MPIC_INT_REG_SIZE) {

        idx += (addr & 0xFFF0) >> 5;

        if (addr & 0x10) {
@@ -1461,7 +1457,6 @@ static void mpic_src_msg_write (void *opaque, target_phys_addr_t addr, 
    if (addr & 0xF)

        return;



    addr -= MPIC_MSG_REG_START & (OPENPIC_PAGE_SIZE - 1);

    if (addr < MPIC_MSG_REG_SIZE) {

        idx += (addr & 0xFFF0) >> 5;

        if (addr & 0x10) {
@@ -1485,7 +1480,6 @@ static uint32_t mpic_src_msg_read (void *opaque, target_phys_addr_t addr) 
    if (addr & 0xF)

        return retval;



    addr -= MPIC_MSG_REG_START & (OPENPIC_PAGE_SIZE - 1);

    if (addr < MPIC_MSG_REG_SIZE) {

        idx += (addr & 0xFFF0) >> 5;

        if (addr & 0x10) {
@@ -1511,7 +1505,6 @@ static void mpic_src_msi_write (void *opaque, target_phys_addr_t addr, 
    if (addr & 0xF)

        return;



    addr -= MPIC_MSI_REG_START & (OPENPIC_PAGE_SIZE - 1);

    if (addr < MPIC_MSI_REG_SIZE) {

        idx += (addr & 0xFFF0) >> 5;

        if (addr & 0x10) {
@@ -1534,7 +1527,6 @@ static uint32_t mpic_src_msi_read (void *opaque, target_phys_addr_t addr) 
    if (addr & 0xF)

        return retval;



    addr -= MPIC_MSI_REG_START & (OPENPIC_PAGE_SIZE - 1);

    if (addr < MPIC_MSI_REG_SIZE) {

        idx += (addr & 0xFFF0) >> 5;

        if (addr & 0x10) {

hw/ppc405_uc.c

+2 −0
Original line number Diff line number Diff line
@@ -2471,6 +2471,8 @@ CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem, 
    ppc4xx_pob_init(env);

    /* OBP arbitrer */

    ppc4xx_opba_init(0xef600600);

    /* Initialize timers */

    ppc_booke_timers_init(env, sysclk, 0);

    /* Universal interrupt controller */

    irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);

    irqs[PPCUIC_OUTPUT_INT] =

hw/ppce500_spin.c

+1 −1
Original line number Diff line number Diff line
@@ -182,7 +182,7 @@ static uint64_t spin_read(void *opaque, target_phys_addr_t addr, unsigned len) 
    }

}



const MemoryRegionOps spin_rw_ops = {

static const MemoryRegionOps spin_rw_ops = {

    .read = spin_read,

    .write = spin_write,

    .endianness = DEVICE_BIG_ENDIAN,

hw/spapr.c

+3 −2
Original line number Diff line number Diff line
@@ -83,7 +83,8 @@ 


sPAPREnvironment *spapr;



qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num)

qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num,

                            enum xics_irq_type type)

{

    uint32_t irq;

    qemu_irq qirq;
@@ -95,7 +96,7 @@ qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num) 
        irq = spapr->next_irq++;

    }



    qirq = xics_find_qirq(spapr->icp, irq);

    qirq = xics_assign_irq(spapr->icp, irq, type);

    if (!qirq) {

        return NULL;

    }

hw/spapr.h

+12 −1
Original line number Diff line number Diff line
@@ -286,7 +286,18 @@ void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn); 
target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,

                             target_ulong *args);



qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num);

qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num,

                            enum xics_irq_type type);



static inline qemu_irq spapr_allocate_msi(uint32_t hint, uint32_t *irq_num)

{

    return spapr_allocate_irq(hint, irq_num, XICS_MSI);

}



static inline qemu_irq spapr_allocate_lsi(uint32_t hint, uint32_t *irq_num)

{

    return spapr_allocate_irq(hint, irq_num, XICS_LSI);

}



static inline uint32_t rtas_ld(target_ulong phys, int n)

{