Loading target/sh4/translate.c +7 −12 Original line number Diff line number Diff line Loading @@ -1635,16 +1635,11 @@ static void _decode_opc(DisasContext * ctx) return; case 0x401b: /* tas.b @Rn */ { TCGv addr, val; addr = tcg_temp_local_new(); tcg_gen_mov_i32(addr, REG(B11_8)); val = tcg_temp_local_new(); tcg_gen_qemu_ld_i32(val, addr, ctx->memidx, MO_UB); TCGv val = tcg_const_i32(0x80); tcg_gen_atomic_fetch_or_i32(val, REG(B11_8), val, ctx->memidx, MO_UB); tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_sr_t, val, 0); tcg_gen_ori_i32(val, val, 0x80); tcg_gen_qemu_st_i32(val, addr, ctx->memidx, MO_UB); tcg_temp_free(val); tcg_temp_free(addr); } return; case 0xf00d: /* fsts FPUL,FRn - FPSCR: Nothing */ Loading Loading
target/sh4/translate.c +7 −12 Original line number Diff line number Diff line Loading @@ -1635,16 +1635,11 @@ static void _decode_opc(DisasContext * ctx) return; case 0x401b: /* tas.b @Rn */ { TCGv addr, val; addr = tcg_temp_local_new(); tcg_gen_mov_i32(addr, REG(B11_8)); val = tcg_temp_local_new(); tcg_gen_qemu_ld_i32(val, addr, ctx->memidx, MO_UB); TCGv val = tcg_const_i32(0x80); tcg_gen_atomic_fetch_or_i32(val, REG(B11_8), val, ctx->memidx, MO_UB); tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_sr_t, val, 0); tcg_gen_ori_i32(val, val, 0x80); tcg_gen_qemu_st_i32(val, addr, ctx->memidx, MO_UB); tcg_temp_free(val); tcg_temp_free(addr); } return; case 0xf00d: /* fsts FPUL,FRn - FPSCR: Nothing */ Loading