Commit c8d70272 authored by Aurelien Jarno's avatar Aurelien Jarno Committed by Richard Henderson
Browse files

tcg/optimize: add known-zero bits compute for load ops 



Reviewed-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: default avatarAurelien Jarno <aurelien@aurel32.net>
Signed-off-by: default avatarRichard Henderson <rth@twiddle.net>
parent f096dc96

tcg/optimize.c

+25 −1
Original line number Diff line number Diff line
@@ -779,13 +779,37 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, 
            mask = temps[args[3]].mask | temps[args[4]].mask;

            break;



        CASE_OP_32_64(ld8u):

        case INDEX_op_qemu_ld8u:

            mask = 0xff;

            break;

        CASE_OP_32_64(ld16u):

        case INDEX_op_qemu_ld16u:

            mask = 0xffff;

            break;

        case INDEX_op_ld32u_i64:

#if TCG_TARGET_REG_BITS == 64

        case INDEX_op_qemu_ld32u:

#endif

            mask = 0xffffffffu;

            break;



        CASE_OP_32_64(qemu_ld):

            {

                TCGMemOp mop = args[def->nb_oargs + def->nb_iargs];

                if (!(mop & MO_SIGN)) {

                    mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;

                }

            }

            break;



        default:

            break;

        }



        /* 32-bit ops (non 64-bit ops and non load/store ops) generate 32-bit

           results */

        if (!(tcg_op_defs[op].flags & (TCG_OPF_CALL_CLOBBER | TCG_OPF_64BIT))) {

        if (!(def->flags & (TCG_OPF_CALL_CLOBBER | TCG_OPF_64BIT))) {

            mask &= 0xffffffffu;

        }