Loading target/s390x/helper.h +4 −0 Original line number Diff line number Diff line Loading @@ -284,6 +284,10 @@ DEF_HELPER_FLAGS_4(gvec_vflr64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_4(gvec_vflr64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfm64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfm64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_6(gvec_vfma64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_6(gvec_vfma64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_6(gvec_vfms64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_6(gvec_vfms64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) Loading target/s390x/insn-data.def +4 −0 Original line number Diff line number Diff line Loading @@ -1236,6 +1236,10 @@ F(0xe7c5, VFLR, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC) /* VECTOR FP MULTIPLY */ F(0xe7e7, VFM, VRR_c, V, 0, 0, 0, 0, vfa, 0, IF_VEC) /* VECTOR FP MULTIPLY AND ADD */ F(0xe78f, VFMA, VRR_e, V, 0, 0, 0, 0, vfma, 0, IF_VEC) /* VECTOR FP MULTIPLY AND SUBTRACT */ F(0xe78e, VFMS, VRR_e, V, 0, 0, 0, 0, vfma, 0, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ Loading target/s390x/translate_vx.inc.c +23 −0 Original line number Diff line number Diff line Loading @@ -2704,3 +2704,26 @@ static DisasJumpType op_vfll(DisasContext *s, DisasOps *o) 0, fn); return DISAS_NEXT; } static DisasJumpType op_vfma(DisasContext *s, DisasOps *o) { const uint8_t m5 = get_field(s->fields, m5); const uint8_t fpf = get_field(s->fields, m6); const bool se = extract32(m5, 3, 1); gen_helper_gvec_4_ptr *fn; if (fpf != FPF_LONG || extract32(m5, 0, 3)) { gen_program_exception(s, PGM_SPECIFICATION); return DISAS_NORETURN; } if (s->fields->op2 == 0x8f) { fn = se ? gen_helper_gvec_vfma64s : gen_helper_gvec_vfma64; } else { fn = se ? gen_helper_gvec_vfms64s : gen_helper_gvec_vfms64; } gen_gvec_4_ptr(get_field(s->fields, v1), get_field(s->fields, v2), get_field(s->fields, v3), get_field(s->fields, v4), cpu_env, 0, fn); return DISAS_NEXT; } target/s390x/vec_fpu_helper.c +48 −0 Original line number Diff line number Diff line Loading @@ -504,3 +504,51 @@ void HELPER(gvec_vfm64s)(void *v1, const void *v2, const void *v3, { vop64_3(v1, v2, v3, env, true, vfm64, GETPC()); } static void vfma64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3, const S390Vector *v4, CPUS390XState *env, bool s, int flags, uintptr_t retaddr) { uint8_t vxc, vec_exc = 0; S390Vector tmp = {}; int i; for (i = 0; i < 2; i++) { const uint64_t a = s390_vec_read_element64(v2, i); const uint64_t b = s390_vec_read_element64(v3, i); const uint64_t c = s390_vec_read_element64(v4, i); uint64_t ret = float64_muladd(a, b, c, flags, &env->fpu_status); s390_vec_write_element64(&tmp, i, ret); vxc = check_ieee_exc(env, i, false, &vec_exc); if (s || vxc) { break; } } handle_ieee_exc(env, vxc, vec_exc, retaddr); *v1 = tmp; } void HELPER(gvec_vfma64)(void *v1, const void *v2, const void *v3, const void *v4, CPUS390XState *env, uint32_t desc) { vfma64(v1, v2, v3, v4, env, false, 0, GETPC()); } void HELPER(gvec_vfma64s)(void *v1, const void *v2, const void *v3, const void *v4, CPUS390XState *env, uint32_t desc) { vfma64(v1, v2, v3, v4, env, true, 0, GETPC()); } void HELPER(gvec_vfms64)(void *v1, const void *v2, const void *v3, const void *v4, CPUS390XState *env, uint32_t desc) { vfma64(v1, v2, v3, v4, env, false, float_muladd_negate_c, GETPC()); } void HELPER(gvec_vfms64s)(void *v1, const void *v2, const void *v3, const void *v4, CPUS390XState *env, uint32_t desc) { vfma64(v1, v2, v3, v4, env, true, float_muladd_negate_c, GETPC()); } Loading
target/s390x/helper.h +4 −0 Original line number Diff line number Diff line Loading @@ -284,6 +284,10 @@ DEF_HELPER_FLAGS_4(gvec_vflr64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_4(gvec_vflr64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfm64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfm64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_6(gvec_vfma64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_6(gvec_vfma64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_6(gvec_vfms64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_6(gvec_vfms64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32) #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) Loading
target/s390x/insn-data.def +4 −0 Original line number Diff line number Diff line Loading @@ -1236,6 +1236,10 @@ F(0xe7c5, VFLR, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC) /* VECTOR FP MULTIPLY */ F(0xe7e7, VFM, VRR_c, V, 0, 0, 0, 0, vfa, 0, IF_VEC) /* VECTOR FP MULTIPLY AND ADD */ F(0xe78f, VFMA, VRR_e, V, 0, 0, 0, 0, vfma, 0, IF_VEC) /* VECTOR FP MULTIPLY AND SUBTRACT */ F(0xe78e, VFMS, VRR_e, V, 0, 0, 0, 0, vfma, 0, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ Loading
target/s390x/translate_vx.inc.c +23 −0 Original line number Diff line number Diff line Loading @@ -2704,3 +2704,26 @@ static DisasJumpType op_vfll(DisasContext *s, DisasOps *o) 0, fn); return DISAS_NEXT; } static DisasJumpType op_vfma(DisasContext *s, DisasOps *o) { const uint8_t m5 = get_field(s->fields, m5); const uint8_t fpf = get_field(s->fields, m6); const bool se = extract32(m5, 3, 1); gen_helper_gvec_4_ptr *fn; if (fpf != FPF_LONG || extract32(m5, 0, 3)) { gen_program_exception(s, PGM_SPECIFICATION); return DISAS_NORETURN; } if (s->fields->op2 == 0x8f) { fn = se ? gen_helper_gvec_vfma64s : gen_helper_gvec_vfma64; } else { fn = se ? gen_helper_gvec_vfms64s : gen_helper_gvec_vfms64; } gen_gvec_4_ptr(get_field(s->fields, v1), get_field(s->fields, v2), get_field(s->fields, v3), get_field(s->fields, v4), cpu_env, 0, fn); return DISAS_NEXT; }
target/s390x/vec_fpu_helper.c +48 −0 Original line number Diff line number Diff line Loading @@ -504,3 +504,51 @@ void HELPER(gvec_vfm64s)(void *v1, const void *v2, const void *v3, { vop64_3(v1, v2, v3, env, true, vfm64, GETPC()); } static void vfma64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3, const S390Vector *v4, CPUS390XState *env, bool s, int flags, uintptr_t retaddr) { uint8_t vxc, vec_exc = 0; S390Vector tmp = {}; int i; for (i = 0; i < 2; i++) { const uint64_t a = s390_vec_read_element64(v2, i); const uint64_t b = s390_vec_read_element64(v3, i); const uint64_t c = s390_vec_read_element64(v4, i); uint64_t ret = float64_muladd(a, b, c, flags, &env->fpu_status); s390_vec_write_element64(&tmp, i, ret); vxc = check_ieee_exc(env, i, false, &vec_exc); if (s || vxc) { break; } } handle_ieee_exc(env, vxc, vec_exc, retaddr); *v1 = tmp; } void HELPER(gvec_vfma64)(void *v1, const void *v2, const void *v3, const void *v4, CPUS390XState *env, uint32_t desc) { vfma64(v1, v2, v3, v4, env, false, 0, GETPC()); } void HELPER(gvec_vfma64s)(void *v1, const void *v2, const void *v3, const void *v4, CPUS390XState *env, uint32_t desc) { vfma64(v1, v2, v3, v4, env, true, 0, GETPC()); } void HELPER(gvec_vfms64)(void *v1, const void *v2, const void *v3, const void *v4, CPUS390XState *env, uint32_t desc) { vfma64(v1, v2, v3, v4, env, false, float_muladd_negate_c, GETPC()); } void HELPER(gvec_vfms64s)(void *v1, const void *v2, const void *v3, const void *v4, CPUS390XState *env, uint32_t desc) { vfma64(v1, v2, v3, v4, env, true, float_muladd_negate_c, GETPC()); }