Commit c6158878 authored by Peter Maydell's avatar Peter Maydell
Browse files

target/arm: Get PRECISERR and IBUSERR the right way round 



For a bus fault, the M profile BFSR bit PRECISERR means a bus
fault on a data access, and IBUSERR means a bus fault on an
instruction access. We had these the wrong way around; fix this.

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarAlistair Francis <alistair.francis@xilinx.com>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-id: 1505137930-13255-4-git-send-email-peter.maydell@linaro.org
parent dc3c4c14

target/arm/helper.c

+4 −4
Original line number Diff line number Diff line
@@ -6430,15 +6430,15 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) 
        case 0x8: /* External Abort */

            switch (cs->exception_index) {

            case EXCP_PREFETCH_ABORT:

                env->v7m.cfsr[M_REG_NS] |= R_V7M_CFSR_PRECISERR_MASK;

                qemu_log_mask(CPU_LOG_INT, "...with CFSR.PRECISERR\n");

                env->v7m.cfsr[M_REG_NS] |= R_V7M_CFSR_IBUSERR_MASK;

                qemu_log_mask(CPU_LOG_INT, "...with CFSR.IBUSERR\n");

                break;

            case EXCP_DATA_ABORT:

                env->v7m.cfsr[M_REG_NS] |=

                    (R_V7M_CFSR_IBUSERR_MASK | R_V7M_CFSR_BFARVALID_MASK);

                    (R_V7M_CFSR_PRECISERR_MASK | R_V7M_CFSR_BFARVALID_MASK);

                env->v7m.bfar = env->exception.vaddress;

                qemu_log_mask(CPU_LOG_INT,

                              "...with CFSR.IBUSERR and BFAR 0x%x\n",

                              "...with CFSR.PRECISERR and BFAR 0x%x\n",

                              env->v7m.bfar);

                break;

            }