Commit c4dae9cd authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by David Gibson
Browse files

target/ppc: Flush the TLB locally when the LPIDR is written 



Our TCG TLB only tags whether it's a HV vs a guest access, so it must
be flushed when the LPIDR is changed.

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
Message-Id: <20190215170029.15641-10-clg@kaod.org>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent 74c4912f

target/ppc/helper.h

+1 −0
Original line number Diff line number Diff line
@@ -689,6 +689,7 @@ DEF_HELPER_2(store_ptcr, void, env, tl) 
#endif

DEF_HELPER_2(store_sdr1, void, env, tl)

DEF_HELPER_2(store_pidr, void, env, tl)

DEF_HELPER_2(store_lpidr, void, env, tl)

DEF_HELPER_FLAGS_2(store_tbl, TCG_CALL_NO_RWG, void, env, tl)

DEF_HELPER_FLAGS_2(store_tbu, TCG_CALL_NO_RWG, void, env, tl)

DEF_HELPER_FLAGS_2(store_atbl, TCG_CALL_NO_RWG, void, env, tl)

target/ppc/misc_helper.c

+15 −0
Original line number Diff line number Diff line
@@ -117,6 +117,21 @@ void helper_store_pidr(CPUPPCState *env, target_ulong val) 
    tlb_flush(CPU(cpu));

}



void helper_store_lpidr(CPUPPCState *env, target_ulong val)

{

    PowerPCCPU *cpu = ppc_env_get_cpu(env);



    env->spr[SPR_LPIDR] = val;



    /*

     * We need to flush the TLB on LPID changes as we only tag HV vs

     * guest in TCG TLB. Also the quadrants means the HV will

     * potentially access and cache entries for the current LPID as

     * well.

     */

    tlb_flush(CPU(cpu));

}



void helper_store_hid0_601(CPUPPCState *env, target_ulong val)

{

    target_ulong hid0;

target/ppc/translate_init.inc.c

+6 −1
Original line number Diff line number Diff line
@@ -408,6 +408,11 @@ static void spr_write_pidr(DisasContext *ctx, int sprn, int gprn) 
    gen_helper_store_pidr(cpu_env, cpu_gpr[gprn]);

}



static void spr_write_lpidr(DisasContext *ctx, int sprn, int gprn)

{

    gen_helper_store_lpidr(cpu_env, cpu_gpr[gprn]);

}



static void spr_read_hior(DisasContext *ctx, int gprn, int sprn)

{

    tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, excp_prefix));
@@ -7885,7 +7890,7 @@ static void gen_spr_book3s_ids(CPUPPCState *env) 
    spr_register_hv(env, SPR_LPIDR, "LPIDR",

                 SPR_NOACCESS, SPR_NOACCESS,

                 SPR_NOACCESS, SPR_NOACCESS,

                 &spr_read_generic, &spr_write_generic,

                 &spr_read_generic, &spr_write_lpidr,

                 0x00000000);

    spr_register_hv(env, SPR_HFSCR, "HFSCR",

                 SPR_NOACCESS, SPR_NOACCESS,