Commit c3e31eaa authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

vmxcap: port to Python 3 



Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent cf0f7cf9

scripts/kvm/vmxcap

+7 −7
Original line number Diff line number Diff line
@@ -27,9 +27,9 @@ MSR_IA32_VMX_VMFUNC = 0x491 
class msr(object):

    def __init__(self):

        try:

            self.f = open('/dev/cpu/0/msr', 'r', 0)

            self.f = open('/dev/cpu/0/msr', 'rb', 0)

        except:

            self.f = open('/dev/msr0', 'r', 0)

            self.f = open('/dev/msr0', 'rb', 0)

    def read(self, index, default = None):

        import struct

        self.f.seek(index)
@@ -49,7 +49,7 @@ class Control(object): 
        val = m.read(nr, 0)

        return (val & 0xffffffff, val >> 32)

    def show(self):

        print self.name

        print(self.name)

        mbz, mb1 = self.read2(self.cap_msr)

        tmbz, tmb1 = 0, 0

        if self.true_cap_msr:
@@ -69,7 +69,7 @@ class Control(object): 
                s = 'forced'

            elif one and zero:

                s = 'yes'

            print '  %-40s %s' % (self.bits[bit], s)

            print('  %-40s %s' % (self.bits[bit], s))



class Misc(object):

    def __init__(self, name, bits, msr):
@@ -77,9 +77,9 @@ class Misc(object): 
        self.bits = bits

        self.msr = msr

    def show(self):

        print self.name

        print(self.name)

        value = msr().read(self.msr, 0)

        print '  Hex: 0x%x' % (value)

        print('  Hex: 0x%x' % (value))

        def first_bit(key):

            if type(key) is tuple:

                return key[0]
@@ -94,7 +94,7 @@ class Misc(object): 
                def fmt(x):

                    return { True: 'yes', False: 'no' }[x]

            v = (value >> lo) & ((1 << (hi - lo + 1)) - 1)

            print '  %-40s %s' % (self.bits[bits], fmt(v))

            print('  %-40s %s' % (self.bits[bits], fmt(v)))



controls = [

    Misc(