Commit c3ce5a23 authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

qemu-tech: document lazy condition code evaluation in cpu.h 



Unlike the other sections, they are pretty specific to a particular CPU.

Reviewed-by: default avatarEmilio G. Cota <cota@braap.org>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent bf28a69e

qemu-tech.texi

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@@ -214,7 +214,6 @@ SH4 
@menu

* QEMU compared to other emulators::

* Portable dynamic translation::

* Condition code optimisations::

* CPU state optimisations::

* Translation cache::

* Direct block chaining::
@@ -290,30 +289,6 @@ performances. 
QEMU's dynamic translation backend is called TCG, for "Tiny Code

Generator". For more information, please take a look at @code{tcg/README}.



@node Condition code optimisations

@section Condition code optimisations



Lazy evaluation of CPU condition codes (@code{EFLAGS} register on x86)

is important for CPUs where every instruction sets the condition

codes. It tends to be less important on conventional RISC systems

where condition codes are only updated when explicitly requested. On

Sparc64, costly update of both 32 and 64 bit condition codes can be

avoided with lazy evaluation.



Instead of computing the condition codes after each x86 instruction,

QEMU just stores one operand (called @code{CC_SRC}), the result

(called @code{CC_DST}) and the type of operation (called

@code{CC_OP}). When the condition codes are needed, the condition

codes can be calculated using this information. In addition, an

optimized calculation can be performed for some instruction types like

conditional branches.



@code{CC_OP} is almost never explicitly set in the generated code

because it is known at translation time.



The lazy condition code evaluation is used on x86, m68k, cris and

Sparc. ARM uses a simplified variant for the N and Z flags.



@node CPU state optimisations

@section CPU state optimisations

target-cris/cpu.h

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@@ -223,6 +223,13 @@ int cpu_cris_signal_handler(int host_signum, void *pinfo, 
void cris_initialize_tcg(void);

void cris_initialize_crisv10_tcg(void);



/* Instead of computing the condition codes after each CRIS instruction,

 * QEMU just stores one operand (called CC_SRC), the result

 * (called CC_DEST) and the type of operation (called CC_OP). When the

 * condition codes are needed, the condition codes can be calculated

 * using this information. Condition codes are not generated if they

 * are only needed for conditional branches.

 */

enum {

    CC_OP_DYNAMIC, /* Use env->cc_op  */

    CC_OP_FLAGS,

target-i386/cpu.h

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@@ -698,6 +698,13 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; 
/* Use a clearer name for this.  */

#define CPU_INTERRUPT_INIT      CPU_INTERRUPT_RESET



/* Instead of computing the condition codes after each x86 instruction,

 * QEMU just stores one operand (called CC_SRC), the result

 * (called CC_DST) and the type of operation (called CC_OP). When the

 * condition codes are needed, the condition codes can be calculated

 * using this information. Condition codes are not generated if they

 * are only needed for conditional branches.

 */

typedef enum {

    CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */

    CC_OP_EFLAGS,  /* all cc are explicitly computed, CC_SRC = flags */

target-m68k/cpu.h

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@@ -154,6 +154,14 @@ int cpu_m68k_signal_handler(int host_signum, void *pinfo, 
                           void *puc);

void cpu_m68k_flush_flags(CPUM68KState *, int);





/* Instead of computing the condition codes after each m68k instruction,

 * QEMU just stores one operand (called CC_SRC), the result

 * (called CC_DEST) and the type of operation (called CC_OP). When the

 * condition codes are needed, the condition codes can be calculated

 * using this information. Condition codes are not generated if they

 * are only needed for conditional branches.

 */

enum {

    CC_OP_DYNAMIC, /* Use env->cc_op  */

    CC_OP_FLAGS, /* CC_DEST = CVZN, CC_SRC = unused */

target-s390x/cpu.h

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@@ -671,6 +671,13 @@ ObjectClass *s390_cpu_class_by_name(const char *name); 


/* CC optimization */



/* Instead of computing the condition codes after each x86 instruction,

 * QEMU just stores the result (called CC_DST), the type of operation

 * (called CC_OP) and whatever operands are needed (CC_SRC and possibly

 * CC_VR). When the condition codes are needed, the condition codes can

 * be calculated using this information. Condition codes are not generated

 * if they are only needed for conditional branches.

 */

enum cc_op {

    CC_OP_CONST0 = 0,           /* CC is 0 */

    CC_OP_CONST1,               /* CC is 1 */