Loading target-mips/cpu.h +2 −2 Original line number Diff line number Diff line Loading @@ -599,7 +599,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, #define cpu_handle_mmu_fault cpu_mips_handle_mmu_fault void do_interrupt (CPUState *env); void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra); target_phys_addr_t do_translate_address (CPUState *env, target_ulong address, target_phys_addr_t cpu_mips_translate_address (CPUState *env, target_ulong address, int rw); static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) Loading target-mips/helper.c +4 −4 Original line number Diff line number Diff line Loading @@ -311,7 +311,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, } #if !defined(CONFIG_USER_ONLY) target_phys_addr_t do_translate_address(CPUState *env, target_ulong address, int rw) target_phys_addr_t cpu_mips_translate_address(CPUState *env, target_ulong address, int rw) { target_phys_addr_t physical; int prot; Loading @@ -326,11 +326,11 @@ target_phys_addr_t do_translate_address(CPUState *env, target_ulong address, int address, rw, access_type); if (ret != TLBRET_MATCH) { raise_mmu_exception(env, address, rw, ret); cpu_loop_exit(); } return -1LL; } else { return physical; } } #endif static const char * const excp_names[EXCP_LAST + 1] = { Loading target-mips/op_helper.c +16 −2 Original line number Diff line number Diff line Loading @@ -276,10 +276,24 @@ void helper_dmultu (target_ulong arg1, target_ulong arg2) #endif #ifndef CONFIG_USER_ONLY static inline target_phys_addr_t do_translate_address(target_ulong address, int rw) { target_phys_addr_t lladdr; lladdr = cpu_mips_translate_address(env, address, rw); if (lladdr == -1LL) { cpu_loop_exit(); } else { return lladdr; } } #define HELPER_LD_ATOMIC(name, insn) \ target_ulong helper_##name(target_ulong arg, int mem_idx) \ { \ env->lladdr = do_translate_address(env, arg, 0); \ env->lladdr = do_translate_address(arg, 0); \ env->llval = do_##insn(arg, mem_idx); \ return env->llval; \ } Loading @@ -298,7 +312,7 @@ target_ulong helper_##name(target_ulong arg1, target_ulong arg2, int mem_idx) \ env->CP0_BadVAddr = arg2; \ helper_raise_exception(EXCP_AdES); \ } \ if (do_translate_address(env, arg2, 1) == env->lladdr) { \ if (do_translate_address(arg2, 1) == env->lladdr) { \ tmp = do_##ld_insn(arg2, mem_idx); \ if (tmp == env->llval) { \ do_##st_insn(arg2, arg1, mem_idx); \ Loading Loading
target-mips/cpu.h +2 −2 Original line number Diff line number Diff line Loading @@ -599,7 +599,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, #define cpu_handle_mmu_fault cpu_mips_handle_mmu_fault void do_interrupt (CPUState *env); void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra); target_phys_addr_t do_translate_address (CPUState *env, target_ulong address, target_phys_addr_t cpu_mips_translate_address (CPUState *env, target_ulong address, int rw); static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) Loading
target-mips/helper.c +4 −4 Original line number Diff line number Diff line Loading @@ -311,7 +311,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, } #if !defined(CONFIG_USER_ONLY) target_phys_addr_t do_translate_address(CPUState *env, target_ulong address, int rw) target_phys_addr_t cpu_mips_translate_address(CPUState *env, target_ulong address, int rw) { target_phys_addr_t physical; int prot; Loading @@ -326,11 +326,11 @@ target_phys_addr_t do_translate_address(CPUState *env, target_ulong address, int address, rw, access_type); if (ret != TLBRET_MATCH) { raise_mmu_exception(env, address, rw, ret); cpu_loop_exit(); } return -1LL; } else { return physical; } } #endif static const char * const excp_names[EXCP_LAST + 1] = { Loading
target-mips/op_helper.c +16 −2 Original line number Diff line number Diff line Loading @@ -276,10 +276,24 @@ void helper_dmultu (target_ulong arg1, target_ulong arg2) #endif #ifndef CONFIG_USER_ONLY static inline target_phys_addr_t do_translate_address(target_ulong address, int rw) { target_phys_addr_t lladdr; lladdr = cpu_mips_translate_address(env, address, rw); if (lladdr == -1LL) { cpu_loop_exit(); } else { return lladdr; } } #define HELPER_LD_ATOMIC(name, insn) \ target_ulong helper_##name(target_ulong arg, int mem_idx) \ { \ env->lladdr = do_translate_address(env, arg, 0); \ env->lladdr = do_translate_address(arg, 0); \ env->llval = do_##insn(arg, mem_idx); \ return env->llval; \ } Loading @@ -298,7 +312,7 @@ target_ulong helper_##name(target_ulong arg1, target_ulong arg2, int mem_idx) \ env->CP0_BadVAddr = arg2; \ helper_raise_exception(EXCP_AdES); \ } \ if (do_translate_address(env, arg2, 1) == env->lladdr) { \ if (do_translate_address(arg2, 1) == env->lladdr) { \ tmp = do_##ld_insn(arg2, mem_idx); \ if (tmp == env->llval) { \ do_##st_insn(arg2, arg1, mem_idx); \ Loading