Commit c31da136 authored by Aurelien Jarno's avatar Aurelien Jarno
Browse files

target-i386: remove old code handling float64 



Now that target-i386 uses softfloat, floatx80 is always available and
there is no need anymore to have code handling both float64 and floax80.

Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarAurelien Jarno <aurelien@aurel32.net>
parent 142ab5bb

target-i386/cpu.h

+4 −18
Original line number Diff line number Diff line
@@ -532,16 +532,6 @@ enum { 
    CC_OP_NB,

};



#ifdef FLOATX80

#define USE_X86LDOUBLE

#endif



#ifdef USE_X86LDOUBLE

typedef floatx80 CPU86_LDouble;

#else

typedef float64 CPU86_LDouble;

#endif



typedef struct SegmentCache {

    uint32_t selector;

    target_ulong base;
@@ -594,11 +584,7 @@ typedef union { 
#define MMX_Q(n) q



typedef union {

#ifdef USE_X86LDOUBLE

    CPU86_LDouble d __attribute__((aligned(16)));

#else

    CPU86_LDouble d;

#endif

    floatx80 d __attribute__((aligned(16)));

    MMXReg mmx;

} FPReg;
@@ -654,7 +640,7 @@ typedef struct CPUX86State { 


    /* emulator internal variables */

    float_status fp_status;

    CPU86_LDouble ft0;

    floatx80 ft0;



    float_status mmx_status; /* for 3DNow! float ops */

    float_status sse_status;
@@ -865,8 +851,8 @@ static inline void cpu_x86_set_cpl(CPUX86State *s, int cpl) 


/* op_helper.c */

/* used for debug or cpu save/restore */

void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, CPU86_LDouble f);

CPU86_LDouble cpu_set_fp80(uint64_t mant, uint16_t upper);

void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f);

floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper);



/* cpu-exec.c */

/* the following helpers are only usable in user mode simulation as

target-i386/exec.h

+4 −128
Original line number Diff line number Diff line
@@ -98,67 +98,6 @@ static inline void svm_check_intercept(uint32_t type) 


#endif /* !defined(CONFIG_USER_ONLY) */



#ifdef USE_X86LDOUBLE

/* use long double functions */

#define floatx_to_int32 floatx80_to_int32

#define floatx_to_int64 floatx80_to_int64

#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero

#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero

#define int32_to_floatx int32_to_floatx80

#define int64_to_floatx int64_to_floatx80

#define float32_to_floatx float32_to_floatx80

#define float64_to_floatx float64_to_floatx80

#define floatx_to_float32 floatx80_to_float32

#define floatx_to_float64 floatx80_to_float64

#define floatx_add floatx80_add

#define floatx_div floatx80_div

#define floatx_mul floatx80_mul

#define floatx_sub floatx80_sub

#define floatx_sqrt floatx80_sqrt

#define floatx_abs floatx80_abs

#define floatx_chs floatx80_chs

#define floatx_scalbn floatx80_scalbn

#define floatx_round_to_int floatx80_round_to_int

#define floatx_compare floatx80_compare

#define floatx_compare_quiet floatx80_compare_quiet

#define floatx_is_any_nan floatx80_is_any_nan

#define floatx_is_neg floatx80_is_neg

#define floatx_is_zero floatx80_is_zero

#define floatx_zero floatx80_zero

#define floatx_one floatx80_one

#define floatx_ln2 floatx80_ln2

#define floatx_pi floatx80_pi

#else

#define floatx_to_int32 float64_to_int32

#define floatx_to_int64 float64_to_int64

#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero

#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero

#define int32_to_floatx int32_to_float64

#define int64_to_floatx int64_to_float64

#define float32_to_floatx float32_to_float64

#define float64_to_floatx(x, e) (x)

#define floatx_to_float32 float64_to_float32

#define floatx_to_float64(x, e) (x)

#define floatx_add float64_add

#define floatx_div float64_div

#define floatx_mul float64_mul

#define floatx_sub float64_sub

#define floatx_sqrt float64_sqrt

#define floatx_abs float64_abs

#define floatx_chs float64_chs

#define floatx_scalbn float64_scalbn

#define floatx_round_to_int float64_round_to_int

#define floatx_compare float64_compare

#define floatx_compare_quiet float64_compare_quiet

#define floatx_is_any_nan float64_is_any_nan

#define floatx_is_neg float64_is_neg

#define floatx_is_zero float64_is_zero

#define floatx_zero float64_zero

#define floatx_one float64_one

#define floatx_ln2 float64_ln2

#define floatx_pi float64_pi

#endif



#define RC_MASK         0xc00

#define RC_NEAR		0x000

#define RC_DOWN		0x400
@@ -167,11 +106,6 @@ static inline void svm_check_intercept(uint32_t type) 


#define MAXTAN 9223372036854775808.0



#ifdef USE_X86LDOUBLE



/* only for x86 */

typedef CPU_LDoubleU CPU86_LDoubleU;



/* the following deal with x86 long double-precision numbers */

#define MAXEXPD 0x7fff

#define EXPBIAS 16383
@@ -180,23 +114,6 @@ typedef CPU_LDoubleU CPU86_LDoubleU; 
#define MANTD(fp)       (fp.l.lower)

#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS



#else



typedef CPU_DoubleU CPU86_LDoubleU;



/* the following deal with IEEE double-precision numbers */

#define MAXEXPD 0x7ff

#define EXPBIAS 1023

#define EXPD(fp)	(((fp.l.upper) >> 20) & 0x7FF)

#define SIGND(fp)	((fp.l.upper) & 0x80000000)

#ifdef __arm__

#define MANTD(fp)	(fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))

#else

#define MANTD(fp)	(fp.ll & ((1LL << 52) - 1))

#endif

#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)

#endif



static inline void fpush(void)

{

    env->fpstt = (env->fpstt - 1) & 7;
@@ -209,65 +126,24 @@ static inline void fpop(void) 
    env->fpstt = (env->fpstt + 1) & 7;

}



#ifndef USE_X86LDOUBLE

static inline CPU86_LDouble helper_fldt(target_ulong ptr)

{

    CPU86_LDoubleU temp;

    int upper, e;

    uint64_t ll;



    /* mantissa */

    upper = lduw(ptr + 8);

    /* XXX: handle overflow ? */

    e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */

    e |= (upper >> 4) & 0x800; /* sign */

    ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);

#ifdef __arm__

    temp.l.upper = (e << 20) | (ll >> 32);

    temp.l.lower = ll;

#else

    temp.ll = ll | ((uint64_t)e << 52);

#endif

    return temp.d;

}



static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)

static inline floatx80 helper_fldt(target_ulong ptr)

{

    CPU86_LDoubleU temp;

    int e;



    temp.d = f;

    /* mantissa */

    stq(ptr, (MANTD(temp) << 11) | (1LL << 63));

    /* exponent + sign */

    e = EXPD(temp) - EXPBIAS + 16383;

    e |= SIGND(temp) >> 16;

    stw(ptr + 8, e);

}

#else



/* we use memory access macros */



static inline CPU86_LDouble helper_fldt(target_ulong ptr)

{

    CPU86_LDoubleU temp;

    CPU_LDoubleU temp;



    temp.l.lower = ldq(ptr);

    temp.l.upper = lduw(ptr + 8);

    return temp.d;

}



static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)

static inline void helper_fstt(floatx80 f, target_ulong ptr)

{

    CPU86_LDoubleU temp;

    CPU_LDoubleU temp;



    temp.d = f;

    stq(ptr, temp.l.lower);

    stw(ptr + 8, temp.l.upper);

}



#endif /* USE_X86LDOUBLE */



#define FPUS_IE (1 << 0)

#define FPUS_DE (1 << 1)

#define FPUS_ZE (1 << 2)

target-i386/helper.c

+0 −5
Original line number Diff line number Diff line
@@ -403,15 +403,10 @@ void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf, 
                    fptag,

                    env->mxcsr);

        for(i=0;i<8;i++) {

#if defined(USE_X86LDOUBLE)

            CPU_LDoubleU u;

            u.d = env->fpregs[i].d;

            cpu_fprintf(f, "FPR%d=%016" PRIx64 " %04x",

                        i, u.l.lower, u.l.upper);

#else

            cpu_fprintf(f, "FPR%d=%016" PRIx64,

                        i, env->fpregs[i].mmx.q);

#endif

            if ((i & 1) == 1)

                cpu_fprintf(f, "\n");

            else

target-i386/machine.c

+0 −101
Original line number Diff line number Diff line
@@ -84,7 +84,6 @@ static void put_fpreg_error(QEMUFile *f, void *opaque, size_t size) 
    exit(0);

}



#ifdef USE_X86LDOUBLE

/* XXX: add that in a FPU generic layer */

union x86_longdouble {

    uint64_t mant;
@@ -202,102 +201,6 @@ static bool fpregs_is_1_no_mmx(void *opaque, int version_id) 
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \

    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg)



#else

static int get_fpreg(QEMUFile *f, void *opaque, size_t size)

{

    FPReg *fp_reg = opaque;



    qemu_get_be64s(f, &fp_reg->mmx.MMX_Q(0));

    return 0;

}



static void put_fpreg(QEMUFile *f, void *opaque, size_t size)

{

    FPReg *fp_reg = opaque;

    /* if we use doubles for float emulation, we save the doubles to

       avoid losing information in case of MMX usage. It can give

       problems if the image is restored on a CPU where long

       doubles are used instead. */

    qemu_put_be64s(f, &fp_reg->mmx.MMX_Q(0));

}



const VMStateInfo vmstate_fpreg = {

    .name = "fpreg",

    .get  = get_fpreg,

    .put  = put_fpreg,

};



static int get_fpreg_0_mmx(QEMUFile *f, void *opaque, size_t size)

{

    FPReg *fp_reg = opaque;

    uint64_t mant;

    uint16_t exp;



    qemu_get_be64s(f, &mant);

    qemu_get_be16s(f, &exp);

    fp_reg->mmx.MMX_Q(0) = mant;

    return 0;

}



const VMStateInfo vmstate_fpreg_0_mmx = {

    .name = "fpreg_0_mmx",

    .get  = get_fpreg_0_mmx,

    .put  = put_fpreg_error,

};



static int get_fpreg_0_no_mmx(QEMUFile *f, void *opaque, size_t size)

{

    FPReg *fp_reg = opaque;

    uint64_t mant;

    uint16_t exp;



    qemu_get_be64s(f, &mant);

    qemu_get_be16s(f, &exp);



    fp_reg->d = cpu_set_fp80(mant, exp);

    return 0;

}



const VMStateInfo vmstate_fpreg_0_no_mmx = {

    .name = "fpreg_0_no_mmx",

    .get  = get_fpreg_0_no_mmx,

    .put  = put_fpreg_error,

};



static bool fpregs_is_1(void *opaque, int version_id)

{

    CPUState *env = opaque;



    return env->fpregs_format_vmstate == 1;

}



static bool fpregs_is_0_mmx(void *opaque, int version_id)

{

    CPUState *env = opaque;

    int guess_mmx;



    guess_mmx = ((env->fptag_vmstate == 0xff) &&

                 (env->fpus_vmstate & 0x3800) == 0);

    return guess_mmx && env->fpregs_format_vmstate == 0;

}



static bool fpregs_is_0_no_mmx(void *opaque, int version_id)

{

    CPUState *env = opaque;

    int guess_mmx;



    guess_mmx = ((env->fptag_vmstate == 0xff) &&

                 (env->fpus_vmstate & 0x3800) == 0);

    return !guess_mmx && env->fpregs_format_vmstate == 0;

}



#define VMSTATE_FP_REGS(_field, _state, _n)                               \

    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1, vmstate_fpreg, FPReg), \

    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_mmx, vmstate_fpreg_0_mmx, FPReg), \

    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_no_mmx, vmstate_fpreg_0_no_mmx, FPReg)



#endif /* USE_X86LDOUBLE */



static bool version_is_5(void *opaque, int version_id)

{

    return version_id == 5;
@@ -344,11 +247,7 @@ static void cpu_pre_save(void *opaque) 
        env->fptag_vmstate |= ((!env->fptags[i]) << i);

    }



#ifdef USE_X86LDOUBLE

    env->fpregs_format_vmstate = 0;

#else

    env->fpregs_format_vmstate = 1;

#endif

}



static int cpu_post_load(void *opaque, int version_id)

target-i386/op_helper.c

+107 −159

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