Commit c2c76850 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-2.13-pull-request' into staging 



# gpg: Signature made Mon 30 Apr 2018 10:05:56 BST
# gpg:                using RSA key F30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>"
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>"
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-2.13-pull-request: (42 commits)
  linux-user: Add ARM get_tls syscall support
  linux-user: move xtensa cpu loop to xtensa directory
  linux-user: move hppa cpu loop to hppa directory
  linux-user: move riscv cpu loop to riscv directory
  linux-user: move tilegx cpu loop to tilegx directory
  linux-user: move s390x cpu loop to s390x directory
  linux-user: move alpha cpu loop to alpha directory
  linux-user: move m68k cpu loop to m68k directory
  linux-user: move microblaze cpu loop to microblaze directory
  linux-user: move cris cpu loop to cris directory
  linux-user: move sh4 cpu loop to sh4 directory
  linux-user: move openrisc cpu loop to openrisc directory
  linux-user: move nios2 cpu loop to nios2 directory
  linux-user: move mips/mips64 cpu loop to mips directory
  linux-user: move ppc/ppc64 cpu loop to ppc directory
  linux-user: move sparc/sparc64 cpu loop to sparc directory
  linux-user: move arm cpu loop to arm directory
  linux-user: move aarch64 cpu loop to aarch64 directory
  linux-user: move i386/x86_64 cpu loop to i386 directory
  linux-user: create a dummy per arch cpu_loop.c
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 6f0c4706 62aaa514

linux-user/Makefile.objs

+2 −1
Original line number Diff line number Diff line 
obj-y = main.o syscall.o strace.o mmap.o signal.o \

	elfload.o linuxload.o uaccess.o uname.o \

	safe-syscall.o

	safe-syscall.o $(TARGET_ABI_DIR)/signal.o \

        $(TARGET_ABI_DIR)/cpu_loop.o



obj-$(TARGET_HAS_BFLT) += flatload.o

obj-$(TARGET_I386) += vm86.o

linux-user/aarch64/cpu_loop.c

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+182 −0
Original line number Diff line number Diff line 
/*

 *  qemu user cpu loop

 *

 *  Copyright (c) 2003-2008 Fabrice Bellard

 *

 *  This program is free software; you can redistribute it and/or modify

 *  it under the terms of the GNU General Public License as published by

 *  the Free Software Foundation; either version 2 of the License, or

 *  (at your option) any later version.

 *

 *  This program is distributed in the hope that it will be useful,

 *  but WITHOUT ANY WARRANTY; without even the implied warranty of

 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *  GNU General Public License for more details.

 *

 *  You should have received a copy of the GNU General Public License

 *  along with this program; if not, see <http://www.gnu.org/licenses/>.

 */



#include "qemu/osdep.h"

#include "qemu.h"

#include "cpu_loop-common.h"



#define get_user_code_u32(x, gaddr, env)                \

    ({ abi_long __r = get_user_u32((x), (gaddr));       \

        if (!__r && bswap_code(arm_sctlr_b(env))) {     \

            (x) = bswap32(x);                           \

        }                                               \

        __r;                                            \

    })



#define get_user_code_u16(x, gaddr, env)                \

    ({ abi_long __r = get_user_u16((x), (gaddr));       \

        if (!__r && bswap_code(arm_sctlr_b(env))) {     \

            (x) = bswap16(x);                           \

        }                                               \

        __r;                                            \

    })



#define get_user_data_u32(x, gaddr, env)                \

    ({ abi_long __r = get_user_u32((x), (gaddr));       \

        if (!__r && arm_cpu_bswap_data(env)) {          \

            (x) = bswap32(x);                           \

        }                                               \

        __r;                                            \

    })



#define get_user_data_u16(x, gaddr, env)                \

    ({ abi_long __r = get_user_u16((x), (gaddr));       \

        if (!__r && arm_cpu_bswap_data(env)) {          \

            (x) = bswap16(x);                           \

        }                                               \

        __r;                                            \

    })



#define put_user_data_u32(x, gaddr, env)                \

    ({ typeof(x) __x = (x);                             \

        if (arm_cpu_bswap_data(env)) {                  \

            __x = bswap32(__x);                         \

        }                                               \

        put_user_u32(__x, (gaddr));                     \

    })



#define put_user_data_u16(x, gaddr, env)                \

    ({ typeof(x) __x = (x);                             \

        if (arm_cpu_bswap_data(env)) {                  \

            __x = bswap16(__x);                         \

        }                                               \

        put_user_u16(__x, (gaddr));                     \

    })



/* AArch64 main loop */

void cpu_loop(CPUARMState *env)

{

    CPUState *cs = CPU(arm_env_get_cpu(env));

    int trapnr, sig;

    abi_long ret;

    target_siginfo_t info;



    for (;;) {

        cpu_exec_start(cs);

        trapnr = cpu_exec(cs);

        cpu_exec_end(cs);

        process_queued_cpu_work(cs);



        switch (trapnr) {

        case EXCP_SWI:

            ret = do_syscall(env,

                             env->xregs[8],

                             env->xregs[0],

                             env->xregs[1],

                             env->xregs[2],

                             env->xregs[3],

                             env->xregs[4],

                             env->xregs[5],

                             0, 0);

            if (ret == -TARGET_ERESTARTSYS) {

                env->pc -= 4;

            } else if (ret != -TARGET_QEMU_ESIGRETURN) {

                env->xregs[0] = ret;

            }

            break;

        case EXCP_INTERRUPT:

            /* just indicate that signals should be handled asap */

            break;

        case EXCP_UDEF:

            info.si_signo = TARGET_SIGILL;

            info.si_errno = 0;

            info.si_code = TARGET_ILL_ILLOPN;

            info._sifields._sigfault._addr = env->pc;

            queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

            break;

        case EXCP_PREFETCH_ABORT:

        case EXCP_DATA_ABORT:

            info.si_signo = TARGET_SIGSEGV;

            info.si_errno = 0;

            /* XXX: check env->error_code */

            info.si_code = TARGET_SEGV_MAPERR;

            info._sifields._sigfault._addr = env->exception.vaddress;

            queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

            break;

        case EXCP_DEBUG:

        case EXCP_BKPT:

            sig = gdb_handlesig(cs, TARGET_SIGTRAP);

            if (sig) {

                info.si_signo = sig;

                info.si_errno = 0;

                info.si_code = TARGET_TRAP_BRKPT;

                queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

            }

            break;

        case EXCP_SEMIHOST:

            env->xregs[0] = do_arm_semihosting(env);

            break;

        case EXCP_YIELD:

            /* nothing to do here for user-mode, just resume guest code */

            break;

        case EXCP_ATOMIC:

            cpu_exec_step_atomic(cs);

            break;

        default:

            EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);

            abort();

        }

        process_pending_signals(env);

        /* Exception return on AArch64 always clears the exclusive monitor,

         * so any return to running guest code implies this.

         */

        env->exclusive_addr = -1;

    }

}



void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)

{

    CPUState *cpu = ENV_GET_CPU(env);

    TaskState *ts = cpu->opaque;

    struct image_info *info = ts->info;

    int i;



    if (!(arm_feature(env, ARM_FEATURE_AARCH64))) {

        fprintf(stderr,

                "The selected ARM CPU does not support 64 bit mode\n");

        exit(EXIT_FAILURE);

    }



    for (i = 0; i < 31; i++) {

        env->xregs[i] = regs->regs[i];

    }

    env->pc = regs->pc;

    env->xregs[31] = regs->sp;

#ifdef TARGET_WORDS_BIGENDIAN

    env->cp15.sctlr_el[1] |= SCTLR_E0E;

    for (i = 1; i < 4; ++i) {

        env->cp15.sctlr_el[i] |= SCTLR_EE;

    }

#endif



    ts->stack_base = info->start_stack;

    ts->heap_base = info->brk;

    /* This will be filled in on the first SYS_HEAPINFO call.  */

    ts->heap_limit = 0;

}

linux-user/aarch64/signal.c

0 → 100644
+586 −0

File added.

Preview size limit exceeded, changes collapsed.

linux-user/aarch64/target_signal.h

+1 −0
Original line number Diff line number Diff line
@@ -26,4 +26,5 @@ static inline abi_ulong get_sp_from_cpustate(CPUARMState *state) 
   return state->xregs[31];

}



#define TARGET_ARCH_HAS_SETUP_FRAME

#endif /* AARCH64_TARGET_SIGNAL_H */

linux-user/alpha/cpu_loop.c

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+225 −0
Original line number Diff line number Diff line 
/*

 *  qemu user cpu loop

 *

 *  Copyright (c) 2003-2008 Fabrice Bellard

 *

 *  This program is free software; you can redistribute it and/or modify

 *  it under the terms of the GNU General Public License as published by

 *  the Free Software Foundation; either version 2 of the License, or

 *  (at your option) any later version.

 *

 *  This program is distributed in the hope that it will be useful,

 *  but WITHOUT ANY WARRANTY; without even the implied warranty of

 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *  GNU General Public License for more details.

 *

 *  You should have received a copy of the GNU General Public License

 *  along with this program; if not, see <http://www.gnu.org/licenses/>.

 */



#include "qemu/osdep.h"

#include "qemu.h"

#include "cpu_loop-common.h"



void cpu_loop(CPUAlphaState *env)

{

    CPUState *cs = CPU(alpha_env_get_cpu(env));

    int trapnr;

    target_siginfo_t info;

    abi_long sysret;



    while (1) {

        bool arch_interrupt = true;



        cpu_exec_start(cs);

        trapnr = cpu_exec(cs);

        cpu_exec_end(cs);

        process_queued_cpu_work(cs);



        switch (trapnr) {

        case EXCP_RESET:

            fprintf(stderr, "Reset requested. Exit\n");

            exit(EXIT_FAILURE);

            break;

        case EXCP_MCHK:

            fprintf(stderr, "Machine check exception. Exit\n");

            exit(EXIT_FAILURE);

            break;

        case EXCP_SMP_INTERRUPT:

        case EXCP_CLK_INTERRUPT:

        case EXCP_DEV_INTERRUPT:

            fprintf(stderr, "External interrupt. Exit\n");

            exit(EXIT_FAILURE);

            break;

        case EXCP_MMFAULT:

            info.si_signo = TARGET_SIGSEGV;

            info.si_errno = 0;

            info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID

                            ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);

            info._sifields._sigfault._addr = env->trap_arg0;

            queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

            break;

        case EXCP_UNALIGN:

            info.si_signo = TARGET_SIGBUS;

            info.si_errno = 0;

            info.si_code = TARGET_BUS_ADRALN;

            info._sifields._sigfault._addr = env->trap_arg0;

            queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

            break;

        case EXCP_OPCDEC:

        do_sigill:

            info.si_signo = TARGET_SIGILL;

            info.si_errno = 0;

            info.si_code = TARGET_ILL_ILLOPC;

            info._sifields._sigfault._addr = env->pc;

            queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

            break;

        case EXCP_ARITH:

            info.si_signo = TARGET_SIGFPE;

            info.si_errno = 0;

            info.si_code = TARGET_FPE_FLTINV;

            info._sifields._sigfault._addr = env->pc;

            queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

            break;

        case EXCP_FEN:

            /* No-op.  Linux simply re-enables the FPU.  */

            break;

        case EXCP_CALL_PAL:

            switch (env->error_code) {

            case 0x80:

                /* BPT */

                info.si_signo = TARGET_SIGTRAP;

                info.si_errno = 0;

                info.si_code = TARGET_TRAP_BRKPT;

                info._sifields._sigfault._addr = env->pc;

                queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

                break;

            case 0x81:

                /* BUGCHK */

                info.si_signo = TARGET_SIGTRAP;

                info.si_errno = 0;

                info.si_code = 0;

                info._sifields._sigfault._addr = env->pc;

                queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

                break;

            case 0x83:

                /* CALLSYS */

                trapnr = env->ir[IR_V0];

                sysret = do_syscall(env, trapnr,

                                    env->ir[IR_A0], env->ir[IR_A1],

                                    env->ir[IR_A2], env->ir[IR_A3],

                                    env->ir[IR_A4], env->ir[IR_A5],

                                    0, 0);

                if (sysret == -TARGET_ERESTARTSYS) {

                    env->pc -= 4;

                    break;

                }

                if (sysret == -TARGET_QEMU_ESIGRETURN) {

                    break;

                }

                /* Syscall writes 0 to V0 to bypass error check, similar

                   to how this is handled internal to Linux kernel.

                   (Ab)use trapnr temporarily as boolean indicating error.  */

                trapnr = (env->ir[IR_V0] != 0 && sysret < 0);

                env->ir[IR_V0] = (trapnr ? -sysret : sysret);

                env->ir[IR_A3] = trapnr;

                break;

            case 0x86:

                /* IMB */

                /* ??? We can probably elide the code using page_unprotect

                   that is checking for self-modifying code.  Instead we

                   could simply call tb_flush here.  Until we work out the

                   changes required to turn off the extra write protection,

                   this can be a no-op.  */

                break;

            case 0x9E:

                /* RDUNIQUE */

                /* Handled in the translator for usermode.  */

                abort();

            case 0x9F:

                /* WRUNIQUE */

                /* Handled in the translator for usermode.  */

                abort();

            case 0xAA:

                /* GENTRAP */

                info.si_signo = TARGET_SIGFPE;

                switch (env->ir[IR_A0]) {

                case TARGET_GEN_INTOVF:

                    info.si_code = TARGET_FPE_INTOVF;

                    break;

                case TARGET_GEN_INTDIV:

                    info.si_code = TARGET_FPE_INTDIV;

                    break;

                case TARGET_GEN_FLTOVF:

                    info.si_code = TARGET_FPE_FLTOVF;

                    break;

                case TARGET_GEN_FLTUND:

                    info.si_code = TARGET_FPE_FLTUND;

                    break;

                case TARGET_GEN_FLTINV:

                    info.si_code = TARGET_FPE_FLTINV;

                    break;

                case TARGET_GEN_FLTINE:

                    info.si_code = TARGET_FPE_FLTRES;

                    break;

                case TARGET_GEN_ROPRAND:

                    info.si_code = 0;

                    break;

                default:

                    info.si_signo = TARGET_SIGTRAP;

                    info.si_code = 0;

                    break;

                }

                info.si_errno = 0;

                info._sifields._sigfault._addr = env->pc;

                queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

                break;

            default:

                goto do_sigill;

            }

            break;

        case EXCP_DEBUG:

            info.si_signo = gdb_handlesig(cs, TARGET_SIGTRAP);

            if (info.si_signo) {

                info.si_errno = 0;

                info.si_code = TARGET_TRAP_BRKPT;

                queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

            } else {

                arch_interrupt = false;

            }

            break;

        case EXCP_INTERRUPT:

            /* Just indicate that signals should be handled asap.  */

            break;

        case EXCP_ATOMIC:

            cpu_exec_step_atomic(cs);

            arch_interrupt = false;

            break;

        default:

            printf ("Unhandled trap: 0x%x\n", trapnr);

            cpu_dump_state(cs, stderr, fprintf, 0);

            exit(EXIT_FAILURE);

        }

        process_pending_signals (env);



        /* Most of the traps imply a transition through PALcode, which

           implies an REI instruction has been executed.  Which means

           that RX and LOCK_ADDR should be cleared.  But there are a

           few exceptions for traps internal to QEMU.  */

        if (arch_interrupt) {

            env->flags &= ~ENV_FLAG_RX_FLAG;

            env->lock_addr = -1;

        }

    }

}



void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)

{

    int i;



    for(i = 0; i < 28; i++) {

        env->ir[i] = ((abi_ulong *)regs)[i];

    }

    env->ir[IR_SP] = regs->usp;

    env->pc = regs->pc;

}