Commit c25bd18a authored by Peter Maydell's avatar Peter Maydell
Browse files

target-arm: Enable EL2 feature bit on A53 and A57 



Enable the ARM_FEATURE_EL2 bit on Cortex-A52 and
Cortex-A57, since this is all now sufficiently implemented
to work with the GICv3. We provide the usual CPU property
to disable it for backwards compatibility with the older
virt boards.

In this commit, we disable the EL2 feature on the
virt and ZynpMP boards, so there is no overall effect.
Another commit will expose a board-level property to
allow the user to enable EL2.

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarAndrew Jones <drjones@redhat.com>
Reviewed-by: default avatarEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: default avatarAlistair Francis <alistair.francis@xilinx.com>
Message-id: 1483977924-14522-18-git-send-email-peter.maydell@linaro.org
parent 3f591a20

hw/arm/virt.c

+4 −0
Original line number Diff line number Diff line
@@ -1328,6 +1328,10 @@ static void machvirt_init(MachineState *machine) 
            object_property_set_bool(cpuobj, false, "has_el3", NULL);

        }



        if (object_property_find(cpuobj, "has_el2", NULL)) {

            object_property_set_bool(cpuobj, false, "has_el2", NULL);

        }



        if (vms->psci_conduit != QEMU_PSCI_CONDUIT_DISABLED) {

            object_property_set_int(cpuobj, vms->psci_conduit,

                                    "psci-conduit", NULL);

hw/arm/xlnx-zynqmp.c

+2 −0
Original line number Diff line number Diff line
@@ -258,6 +258,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) 


        object_property_set_bool(OBJECT(&s->apu_cpu[i]),

                                 s->secure, "has_el3", NULL);

        object_property_set_bool(OBJECT(&s->apu_cpu[i]),

                                 false, "has_el2", NULL);

        object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,

                                "reset-cbar", &error_abort);

        object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",

target/arm/cpu.c

+12 −0
Original line number Diff line number Diff line
@@ -496,6 +496,9 @@ static Property arm_cpu_reset_hivecs_property = 
static Property arm_cpu_rvbar_property =

            DEFINE_PROP_UINT64("rvbar", ARMCPU, rvbar, 0);



static Property arm_cpu_has_el2_property =

            DEFINE_PROP_BOOL("has_el2", ARMCPU, has_el2, true);



static Property arm_cpu_has_el3_property =

            DEFINE_PROP_BOOL("has_el3", ARMCPU, has_el3, true);
@@ -546,6 +549,11 @@ static void arm_cpu_post_init(Object *obj) 
#endif

    }



    if (arm_feature(&cpu->env, ARM_FEATURE_EL2)) {

        qdev_property_add_static(DEVICE(obj), &arm_cpu_has_el2_property,

                                 &error_abort);

    }



    if (arm_feature(&cpu->env, ARM_FEATURE_PMU)) {

        qdev_property_add_static(DEVICE(obj), &arm_cpu_has_pmu_property,

                                 &error_abort);
@@ -694,6 +702,10 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) 
        cpu->id_aa64pfr0 &= ~0xf000;

    }



    if (!cpu->has_el2) {

        unset_feature(env, ARM_FEATURE_EL2);

    }



    if (!cpu->has_pmu || !kvm_enabled()) {

        cpu->has_pmu = false;

        unset_feature(env, ARM_FEATURE_PMU);

target/arm/cpu.h

+2 −0
Original line number Diff line number Diff line
@@ -577,6 +577,8 @@ struct ARMCPU { 
    bool start_powered_off;

    /* CPU currently in PSCI powered-off state */

    bool powered_off;

    /* CPU has virtualization extension */

    bool has_el2;

    /* CPU has security extension */

    bool has_el3;

    /* CPU has PMU (Performance Monitor Unit) */

target/arm/cpu64.c

+2 −0
Original line number Diff line number Diff line
@@ -110,6 +110,7 @@ static void aarch64_a57_initfn(Object *obj) 
    set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);

    set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);

    set_feature(&cpu->env, ARM_FEATURE_CRC);

    set_feature(&cpu->env, ARM_FEATURE_EL2);

    set_feature(&cpu->env, ARM_FEATURE_EL3);

    set_feature(&cpu->env, ARM_FEATURE_PMU);

    cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A57;
@@ -169,6 +170,7 @@ static void aarch64_a53_initfn(Object *obj) 
    set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);

    set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);

    set_feature(&cpu->env, ARM_FEATURE_CRC);

    set_feature(&cpu->env, ARM_FEATURE_EL2);

    set_feature(&cpu->env, ARM_FEATURE_EL3);

    set_feature(&cpu->env, ARM_FEATURE_PMU);

    cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A53;