Commit c1c9a10f authored by Mateja Marjanovic's avatar Mateja Marjanovic Committed by Aleksandar Markovic
Browse files

target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 



The old version of the helper for the INSERT.<B|H|W|D> MSA instructions
has been replaced with four helpers that don't use switch, and change
the endianness of the given index, when executed on a big endian host.

Signed-off-by: default avatarMateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: default avatarAleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: default avatarAleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1554212605-16457-6-git-send-email-mateja.marjanovic@rt-rk.com>
parent 41d28858

target/mips/helper.h

+4 −1
Original line number Diff line number Diff line
@@ -877,7 +877,6 @@ DEF_HELPER_5(msa_hsub_u_df, void, env, i32, i32, i32, i32) 
DEF_HELPER_5(msa_sldi_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_splati_df, void, env, i32, i32, i32, i32)



DEF_HELPER_5(msa_insert_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_insve_df, void, env, i32, i32, i32, i32)

DEF_HELPER_3(msa_ctcmsa, void, env, tl, i32)

DEF_HELPER_2(msa_cfcmsa, tl, env, i32)
@@ -944,6 +943,10 @@ DEF_HELPER_4(msa_copy_s_d, void, env, i32, i32, i32) 
DEF_HELPER_4(msa_copy_u_b, void, env, i32, i32, i32)

DEF_HELPER_4(msa_copy_u_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_copy_u_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_insert_b, void, env, i32, i32, i32)

DEF_HELPER_4(msa_insert_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_insert_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_insert_d, void, env, i32, i32, i32)



DEF_HELPER_4(msa_fclass_df, void, env, i32, i32, i32)

DEF_HELPER_4(msa_ftrunc_s_df, void, env, i32, i32, i32)

target/mips/msa_helper.c

+49 −16
Original line number Diff line number Diff line
@@ -1340,28 +1340,61 @@ void helper_msa_copy_u_w(CPUMIPSState *env, uint32_t rd, 
    env->active_tc.gpr[rd] = (uint32_t)env->active_fpu.fpr[ws].wr.w[n];

}



void helper_msa_insert_df(CPUMIPSState *env, uint32_t df, uint32_t wd,

void helper_msa_insert_b(CPUMIPSState *env, uint32_t wd,

                          uint32_t rs_num, uint32_t n)

{

    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);

    target_ulong rs = env->active_tc.gpr[rs_num];



    switch (df) {

    case DF_BYTE:

    n %= 16;

#if defined(HOST_WORDS_BIGENDIAN)

    if (n < 8) {

        n = 8 - n - 1;

    } else {

        n = 24 - n - 1;

    }

#endif

    pwd->b[n] = (int8_t)rs;

        break;

    case DF_HALF:

}



void helper_msa_insert_h(CPUMIPSState *env, uint32_t wd,

                          uint32_t rs_num, uint32_t n)

{

    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);

    target_ulong rs = env->active_tc.gpr[rs_num];

    n %= 8;

#if defined(HOST_WORDS_BIGENDIAN)

    if (n < 4) {

        n = 4 - n - 1;

    } else {

        n = 12 - n - 1;

    }

#endif

    pwd->h[n] = (int16_t)rs;

        break;

    case DF_WORD:

}



void helper_msa_insert_w(CPUMIPSState *env, uint32_t wd,

                          uint32_t rs_num, uint32_t n)

{

    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);

    target_ulong rs = env->active_tc.gpr[rs_num];

    n %= 4;

#if defined(HOST_WORDS_BIGENDIAN)

    if (n < 2) {

        n = 2 - n - 1;

    } else {

        n = 6 - n - 1;

    }

#endif

    pwd->w[n] = (int32_t)rs;

        break;

    case DF_DOUBLE:

        pwd->d[n] = (int64_t)rs;

        break;

    default:

        assert(0);

}



void helper_msa_insert_d(CPUMIPSState *env, uint32_t wd,

                          uint32_t rs_num, uint32_t n)

{

    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);

    target_ulong rs = env->active_tc.gpr[rs_num];

    n %= 2;

    pwd->d[n] = (int64_t)rs;

}



void helper_msa_insve_df(CPUMIPSState *env, uint32_t df, uint32_t wd,

target/mips/translate.c

+18 −1
Original line number Diff line number Diff line
@@ -28346,7 +28346,24 @@ static void gen_msa_elm_df(CPUMIPSState *env, DisasContext *ctx, uint32_t df, 
            }

            break;

        case OPC_INSERT_df:

            gen_helper_msa_insert_df(cpu_env, tdf, twd, tws, tn);

            switch (df) {

            case DF_BYTE:

                gen_helper_msa_insert_b(cpu_env, twd, tws, tn);

                break;

            case DF_HALF:

                gen_helper_msa_insert_h(cpu_env, twd, tws, tn);

                break;

            case DF_WORD:

                gen_helper_msa_insert_w(cpu_env, twd, tws, tn);

                break;

#if defined(TARGET_MIPS64)

            case DF_DOUBLE:

                gen_helper_msa_insert_d(cpu_env, twd, tws, tn);

                break;

#endif

            default:

                assert(0);

            }

            break;

        }

        break;