Commit c12d4b60 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-feb-27-2020' into staging



MIPS queue for February 27th, 2020

# gpg: Signature made Thu 27 Feb 2020 13:20:55 GMT
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [full]
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-feb-27-2020:
  tests/acceptance: Count multiple Tux logos displayed on framebuffer
  hw/mips: Use memory_region_init_rom() with read-only regions
  hw/mips/mips_int: Simplify cpu_mips_irq_init_cpu()
  MAINTAINERS: Reactivate MIPS KVM CPUs
  MAINTAINERS: Orphan MIPS KVM CPUs

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 4ae046b8 0484d9d4
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+3 −3
Original line number Diff line number Diff line
@@ -365,9 +365,8 @@ S: Maintained
F: target/arm/kvm.c

MIPS KVM CPUs
M: James Hogan <jhogan@kernel.org>
R: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
S: Maintained
M: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
S: Odd Fixes
F: target/mips/kvm.c

PPC KVM CPUs
@@ -1006,6 +1005,7 @@ F: hw/mips/mips_malta.c
F: hw/mips/gt64xxx_pci.c
F: include/hw/southbridge/piix.h
F: tests/acceptance/linux_ssh_mips_malta.py
F: tests/acceptance/machine_mips_malta.py

Mipssim
M: Aleksandar Markovic <amarkovic@wavecomp.com>
+1 −2
Original line number Diff line number Diff line
@@ -319,9 +319,8 @@ static void mips_fulong2e_init(MachineState *machine)
    }

    /* allocate RAM */
    memory_region_init_ram(bios, NULL, "fulong2e.bios", BIOS_SIZE,
    memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE,
                           &error_fatal);
    memory_region_set_readonly(bios, true);

    memory_region_add_subregion(address_space_mem, 0, machine->ram);
    memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
+1 −1
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ void cpu_mips_irq_init_cpu(MIPSCPU *cpu)
    qemu_irq *qi;
    int i;

    qi = qemu_allocate_irqs(cpu_mips_irq_request, env_archcpu(env), 8);
    qi = qemu_allocate_irqs(cpu_mips_irq_request, cpu, 8);
    for (i = 0; i < 8; i++) {
        env->irq[i] = qi[i];
    }
+2 −4
Original line number Diff line number Diff line
@@ -197,9 +197,8 @@ static void mips_jazz_init(MachineState *machine,
    /* allocate RAM */
    memory_region_add_subregion(address_space, 0, machine->ram);

    memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE,
    memory_region_init_rom(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE,
                           &error_fatal);
    memory_region_set_readonly(bios, true);
    memory_region_init_alias(bios2, NULL, "mips_jazz.bios", bios,
                             0, MAGNUM_BIOS_SIZE);
    memory_region_add_subregion(address_space, 0x1fc00000LL, bios);
@@ -265,9 +264,8 @@ static void mips_jazz_init(MachineState *machine,
        {
            /* Simple ROM, so user doesn't have to provide one */
            MemoryRegion *rom_mr = g_new(MemoryRegion, 1);
            memory_region_init_ram(rom_mr, NULL, "g364fb.rom", 0x80000,
            memory_region_init_rom(rom_mr, NULL, "g364fb.rom", 0x80000,
                                   &error_fatal);
            memory_region_set_readonly(rom_mr, true);
            uint8_t *rom = memory_region_get_ram_ptr(rom_mr);
            memory_region_add_subregion(address_space, 0x60000000, rom_mr);
            rom[0] = 0x10; /* Mips G364 */
+1 −2
Original line number Diff line number Diff line
@@ -165,9 +165,8 @@ mips_mipssim_init(MachineState *machine)
    qemu_register_reset(main_cpu_reset, reset_info);

    /* Allocate RAM. */
    memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE,
    memory_region_init_rom(bios, NULL, "mips_mipssim.bios", BIOS_SIZE,
                           &error_fatal);
    memory_region_set_readonly(bios, true);

    memory_region_add_subregion(address_space_mem, 0, machine->ram);

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