Commit c05541ee authored by Anton Blanchard's avatar Anton Blanchard Committed by Alexander Graf
Browse files

target-ppc: Fix invalid SPR read/write warnings 



Invalid and privileged SPR warnings currently print the wrong
address. While fixing that, also make it clear that we are
printing both the decimal and hexadecimal SPR number.

Before:

  Trying to read invalid spr 896 380 at 0000000000000714

After:

  Trying to read invalid spr 896 (0x380) at 0000000000000710

Signed-off-by: default avatarAnton Blanchard <anton@au1.ibm.com>
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent 126a7930

target-ppc/translate.c

+16 −16
Original line number Diff line number Diff line
@@ -4005,19 +4005,19 @@ static inline void gen_op_mfspr(DisasContext *ctx) 
             * allowing userland application to read the PVR

             */

            if (sprn != SPR_PVR) {

                qemu_log("Trying to read privileged spr %d %03x at "

                         TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);

                printf("Trying to read privileged spr %d %03x at "

                       TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);

                qemu_log("Trying to read privileged spr %d (0x%03x) at "

                         TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);

                printf("Trying to read privileged spr %d (0x%03x) at "

                       TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);

            }

            gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG);

        }

    } else {

        /* Not defined */

        qemu_log("Trying to read invalid spr %d %03x at "

                    TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);

        printf("Trying to read invalid spr %d %03x at " TARGET_FMT_lx "\n",

               sprn, sprn, ctx->nip);

        qemu_log("Trying to read invalid spr %d (0x%03x) at "

                 TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);

        printf("Trying to read invalid spr %d (0x%03x) at "

               TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);

        gen_inval_exception(ctx, POWERPC_EXCP_INVAL_SPR);

    }

}
@@ -4150,18 +4150,18 @@ static void gen_mtspr(DisasContext *ctx) 
            (*write_cb)(ctx, sprn, rS(ctx->opcode));

        } else {

            /* Privilege exception */

            qemu_log("Trying to write privileged spr %d %03x at "

                     TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);

            printf("Trying to write privileged spr %d %03x at " TARGET_FMT_lx

                   "\n", sprn, sprn, ctx->nip);

            qemu_log("Trying to write privileged spr %d (0x%03x) at "

                     TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);

            printf("Trying to write privileged spr %d (0x%03x) at "

                   TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);

            gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG);

        }

    } else {

        /* Not defined */

        qemu_log("Trying to write invalid spr %d %03x at "

                 TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);

        printf("Trying to write invalid spr %d %03x at " TARGET_FMT_lx "\n",

               sprn, sprn, ctx->nip);

        qemu_log("Trying to write invalid spr %d (0x%03x) at "

                 TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);

        printf("Trying to write invalid spr %d (0x%03x) at "

               TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);

        gen_inval_exception(ctx, POWERPC_EXCP_INVAL_SPR);

    }

}