Commit c035851a authored by Cédric Le Goater's avatar Cédric Le Goater Committed by David Gibson
Browse files

ppc/pnv: fix XSCOM core addressing on POWER9 



The XSCOM base address of the core chiplet was wrongly calculated. Use
the OPAL macros to fix that and do a couple of renames.

Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent b3b066e9

hw/ppc/pnv.c

+8 −7
Original line number Diff line number Diff line
@@ -721,7 +721,6 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data) 
    k->cores_mask = POWER8E_CORE_MASK;

    k->core_pir = pnv_chip_core_pir_p8;

    k->xscom_base = 0x003fc0000000000ull;

    k->xscom_core_base = 0x10000000ull;

    dc->desc = "PowerNV Chip POWER8E";

}
@@ -735,7 +734,6 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data) 
    k->cores_mask = POWER8_CORE_MASK;

    k->core_pir = pnv_chip_core_pir_p8;

    k->xscom_base = 0x003fc0000000000ull;

    k->xscom_core_base = 0x10000000ull;

    dc->desc = "PowerNV Chip POWER8";

}
@@ -749,7 +747,6 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data) 
    k->cores_mask = POWER8_CORE_MASK;

    k->core_pir = pnv_chip_core_pir_p8;

    k->xscom_base = 0x003fc0000000000ull;

    k->xscom_core_base = 0x10000000ull;

    dc->desc = "PowerNV Chip POWER8NVL";

}
@@ -763,7 +760,6 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data) 
    k->cores_mask = POWER9_CORE_MASK;

    k->core_pir = pnv_chip_core_pir_p9;

    k->xscom_base = 0x00603fc00000000ull;

    k->xscom_core_base = 0x0ull;

    dc->desc = "PowerNV Chip POWER9";

}
@@ -887,6 +883,7 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp) 
             && (i < chip->nr_cores); core_hwid++) {

        char core_name[32];

        void *pnv_core = chip->cores + i * typesize;

        uint64_t xscom_core_base;



        if (!(chip->cores_mask & (1ull << core_hwid))) {

            continue;
@@ -910,9 +907,13 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp) 
        object_unref(OBJECT(pnv_core));



        /* Each core has an XSCOM MMIO region */

        pnv_xscom_add_subregion(chip,

                                PNV_XSCOM_EX_CORE_BASE(pcc->xscom_core_base,

                                                       core_hwid),

        if (!pnv_chip_is_power9(chip)) {

            xscom_core_base = PNV_XSCOM_EX_BASE(core_hwid);

        } else {

            xscom_core_base = PNV_XSCOM_P9_EC_BASE(core_hwid);

        }



        pnv_xscom_add_subregion(chip, xscom_core_base,

                                &PNV_CORE(pnv_core)->xscom_regs);

        i++;

    }

hw/ppc/pnv_core.c

+1 −1
Original line number Diff line number Diff line
@@ -192,7 +192,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) 


    snprintf(name, sizeof(name), "xscom-core.%d", cc->core_id);

    pnv_xscom_region_init(&pc->xscom_regs, OBJECT(dev), &pnv_core_xscom_ops,

                          pc, name, PNV_XSCOM_EX_CORE_SIZE);

                          pc, name, PNV_XSCOM_EX_SIZE);

    return;



err:

include/hw/ppc/pnv.h

+0 −1
Original line number Diff line number Diff line
@@ -74,7 +74,6 @@ typedef struct PnvChipClass { 
    uint64_t     cores_mask;



    hwaddr       xscom_base;

    hwaddr       xscom_core_base;



    uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id);

} PnvChipClass;

include/hw/ppc/pnv_xscom.h

+11 −2
Original line number Diff line number Diff line
@@ -21,6 +21,8 @@ 


#include "qom/object.h"



typedef struct PnvChip PnvChip;



typedef struct PnvXScomInterface {

    Object parent;

} PnvXScomInterface;
@@ -54,8 +56,15 @@ typedef struct PnvXScomInterfaceClass { 
 *   PCB SLAVE   0x110Fxxxx

 */



#define PNV_XSCOM_EX_CORE_BASE(base, i) ((base) | ((uint64_t)(i) << 24))

#define PNV_XSCOM_EX_CORE_SIZE    0x100000

#define PNV_XSCOM_EX_CORE_BASE    0x10000000ull



#define PNV_XSCOM_EX_BASE(core) \

    (PNV_XSCOM_EX_CORE_BASE | ((uint64_t)(core) << 24))

#define PNV_XSCOM_EX_SIZE         0x100000



#define PNV_XSCOM_P9_EC_BASE(core) \

    ((uint64_t)(((core) & 0x1F) + 0x20) << 24)

#define PNV_XSCOM_P9_EC_SIZE      0x100000



#define PNV_XSCOM_LPC_BASE        0xb0020

#define PNV_XSCOM_LPC_SIZE        0x4

tests/pnv-xscom-test.c

+17 −10
Original line number Diff line number Diff line
@@ -21,7 +21,6 @@ typedef struct PnvChip { 
    PnvChipType chip_type;

    const char *cpu_model;

    uint64_t    xscom_base;

    uint64_t    xscom_core_base;

    uint64_t    cfam_id;

    uint32_t    first_core;

} PnvChip;
@@ -31,14 +30,12 @@ static const PnvChip pnv_chips[] = { 
        .chip_type  = PNV_CHIP_POWER8,

        .cpu_model  = "POWER8",

        .xscom_base = 0x0003fc0000000000ull,

        .xscom_core_base = 0x10000000ull,

        .cfam_id    = 0x220ea04980000000ull,

        .first_core = 0x1,

    }, {

        .chip_type  = PNV_CHIP_POWER8NVL,

        .cpu_model  = "POWER8NVL",

        .xscom_base = 0x0003fc0000000000ull,

        .xscom_core_base = 0x10000000ull,

        .cfam_id    = 0x120d304980000000ull,

        .first_core = 0x1,

    },
@@ -47,7 +44,6 @@ static const PnvChip pnv_chips[] = { 
        .chip_type  = PNV_CHIP_POWER9,

        .cpu_model  = "POWER9",

        .xscom_base = 0x000603fc00000000ull,

        .xscom_core_base = 0x0ull,

        .cfam_id    = 0x220d104900008000ull,

        .first_core = 0x0,

    },
@@ -89,16 +85,27 @@ static void test_cfam_id(const void *data) 
    qtest_quit(global_qtest);

}



#define PNV_XSCOM_EX_CORE_BASE(chip, i)                 \

    ((chip)->xscom_core_base | (((uint64_t)i) << 24))



#define PNV_XSCOM_EX_CORE_BASE    0x10000000ull

#define PNV_XSCOM_EX_BASE(core) \

    (PNV_XSCOM_EX_CORE_BASE | ((uint64_t)(core) << 24))

#define PNV_XSCOM_P9_EC_BASE(core) \

    ((uint64_t)(((core) & 0x1F) + 0x20) << 24)



#define PNV_XSCOM_EX_DTS_RESULT0     0x50000



static void test_xscom_core(const PnvChip *chip)

{

    uint32_t first_core_dts0 =

        PNV_XSCOM_EX_CORE_BASE(chip, chip->first_core) |

        PNV_XSCOM_EX_DTS_RESULT0;

    uint64_t dts0 = pnv_xscom_read(chip, first_core_dts0);

    uint32_t first_core_dts0 = PNV_XSCOM_EX_DTS_RESULT0;

    uint64_t dts0;



    if (chip->chip_type != PNV_CHIP_POWER9) {

        first_core_dts0 |= PNV_XSCOM_EX_BASE(chip->first_core);

    } else {

        first_core_dts0 |= PNV_XSCOM_P9_EC_BASE(chip->first_core);

    }



    dts0 = pnv_xscom_read(chip, first_core_dts0);



    g_assert_cmphex(dts0, ==, 0x26f024f023f0000ull);

}