Commit c026350a authored by BALATON Zoltan's avatar BALATON Zoltan Committed by Gerd Hoffmann
Browse files

ati-vga: Attempt to handle CRTC offset not exact multiple of stride 



MacOS uses non-0 offset so it needs this and the resulting
vbe_start_addr seems correct but picture is still broken with OpenBIOS
after FCode runs but that maybe due to firmware problems now. After
boot, picture is now correct.

It also occured to me that these CRTC regs are also present in VGA so
I wonder if they should be shared in case some drivers try to poke
them via VGA regs or these are a separate set of regs for extended
mode. Added a comment noting this but drivers I've tried so far
program the card accessing ati regs so I did not attempt to change it.

Signed-off-by: default avatarBALATON Zoltan <balaton@eik.bme.hu>
Message-id: 1c6fce457ef7e6f889e38dc0423791be92310a62.1565558093.git.balaton@eik.bme.hu
Signed-off-by: default avatarGerd Hoffmann <kraxel@redhat.com>
parent 747d7ad2

hw/display/ati.c

+15 −7
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ static void ati_vga_switch_mode(ATIVGAState *s) 
        s->mode = EXT_MODE;

        if (s->regs.crtc_gen_cntl & CRTC2_EN) {

            /* CRT controller enabled, use CRTC values */

            /* FIXME Should these be the same as VGA CRTC regs? */

            uint32_t offs = s->regs.crtc_offset & 0x07ffffff;

            int stride = (s->regs.crtc_pitch & 0x7ff) * 8;

            int bpp = 0;
@@ -101,16 +102,23 @@ static void ati_vga_switch_mode(ATIVGAState *s) 
                (s->regs.dac_cntl & DAC_8BIT_EN ? VBE_DISPI_8BIT_DAC : 0));

            /* now set offset and stride after enable as that resets these */

            if (stride) {

                int bypp = DIV_ROUND_UP(bpp, BITS_PER_BYTE);



                vbe_ioport_write_index(&s->vga, 0, VBE_DISPI_INDEX_VIRT_WIDTH);

                vbe_ioport_write_data(&s->vga, 0, stride);

                if (offs % stride == 0) {

                stride *= bypp;

                if (offs % stride) {

                    DPRINTF("CRTC offset is not multiple of pitch\n");

                    vbe_ioport_write_index(&s->vga, 0,

                                           VBE_DISPI_INDEX_X_OFFSET);

                    vbe_ioport_write_data(&s->vga, 0, offs % stride / bypp);

                }

                vbe_ioport_write_index(&s->vga, 0, VBE_DISPI_INDEX_Y_OFFSET);

                vbe_ioport_write_data(&s->vga, 0, offs / stride);

                } else {

                    /* FIXME what to do with this? */

                    error_report("VGA offset is not multiple of pitch, "

                                 "expect bad picture");

                }

                DPRINTF("VBE offset (%d,%d), vbe_start_addr=%x\n",

                        s->vga.vbe_regs[VBE_DISPI_INDEX_X_OFFSET],

                        s->vga.vbe_regs[VBE_DISPI_INDEX_Y_OFFSET],

                        s->vga.vbe_start_addr);

            }

        }

    } else {