Loading hw/arm_gic.c +2 −2 Original line number Diff line number Diff line Loading @@ -460,7 +460,7 @@ static uint32_t gic_cpu_read(void *opaque, target_phys_addr_t offset) case 0x18: /* Highest Pending Interrupt */ return s->current_pending; default: cpu_abort (cpu_single_env, "gic_cpu_writeb: Bad offset %x\n", offset); cpu_abort (cpu_single_env, "gic_cpu_read: Bad offset %x\n", offset); return 0; } } Loading @@ -484,7 +484,7 @@ static void gic_cpu_write(void *opaque, target_phys_addr_t offset, case 0x10: /* End Of Interrupt */ return gic_complete_irq(s, value & 0x3ff); default: cpu_abort (cpu_single_env, "gic_cpu_writeb: Bad offset %x\n", offset); cpu_abort (cpu_single_env, "gic_cpu_write: Bad offset %x\n", offset); return; } gic_update(s); Loading Loading
hw/arm_gic.c +2 −2 Original line number Diff line number Diff line Loading @@ -460,7 +460,7 @@ static uint32_t gic_cpu_read(void *opaque, target_phys_addr_t offset) case 0x18: /* Highest Pending Interrupt */ return s->current_pending; default: cpu_abort (cpu_single_env, "gic_cpu_writeb: Bad offset %x\n", offset); cpu_abort (cpu_single_env, "gic_cpu_read: Bad offset %x\n", offset); return 0; } } Loading @@ -484,7 +484,7 @@ static void gic_cpu_write(void *opaque, target_phys_addr_t offset, case 0x10: /* End Of Interrupt */ return gic_complete_irq(s, value & 0x3ff); default: cpu_abort (cpu_single_env, "gic_cpu_writeb: Bad offset %x\n", offset); cpu_abort (cpu_single_env, "gic_cpu_write: Bad offset %x\n", offset); return; } gic_update(s); Loading