Commit be8b49de authored Mar 01, 2018 by David Hildenbrand Committed by Cornelia Huck Mar 01, 2018

s390x/tcg: fix loading 31bit PSWs with the highest bit set



Let's also put the 31-bit hack in front of the REAL MMU, otherwise right
now we get errors when loading a PSW where the highest bit is set (e.g.
via s390-netboot.img). The highest bit is not masked away, therefore we
inject addressing exceptions into the guest.

The proper fix will later be to do all address wrapping before accessing
the MMU - so we won't get any "wrong" entries in there (which makes
flushing also easier). But that will require more work (wrapping in
load_psw, wrapping when incrementing the PC, wrapping every memory
access).

This fixes the tests/pxe-test test.

Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20180301120826.6847-1-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>

parent eae9f291

target/s390x/excp_helper.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -107,6 +107,10 @@ int s390_cpu_handle_mmu_fault(CPUState *cs, vaddr orig_vaddr, int size,
		return 1;
		}
		} else if (mmu_idx == MMU_REAL_IDX) {
		/* 31-Bit mode */
		if (!(env->psw.mask & PSW_MASK_64)) {
		vaddr &= 0x7fffffff;
		}
		if (mmu_translate_real(env, vaddr, rw, &raddr, &prot)) {
		return 1;
		}