target-i386: Implement BNDLDX, BNDSTX (bdd87b3b) · Commits · SUMMER2020 / students / proj-2021291

target-i386/helper.h

+4 −0

Original line number	Diff line number	Diff line
		@@ -17,6 +17,10 @@ DEF_HELPER_2(idivq_EAX, void, env, tl)
		#endif

		DEF_HELPER_FLAGS_2(bndck, TCG_CALL_NO_WG, void, env, i32)
		DEF_HELPER_FLAGS_3(bndldx32, TCG_CALL_NO_WG, i64, env, tl, tl)
		DEF_HELPER_FLAGS_3(bndldx64, TCG_CALL_NO_WG, i64, env, tl, tl)
		DEF_HELPER_FLAGS_5(bndstx32, TCG_CALL_NO_WG, void, env, tl, tl, i64, i64)
		DEF_HELPER_FLAGS_5(bndstx64, TCG_CALL_NO_WG, void, env, tl, tl, i64, i64)

		DEF_HELPER_2(aam, void, env, int)
		DEF_HELPER_2(aad, void, env, int)

target-i386/mpx_helper.c

+97 −0

Original line number	Diff line number	Diff line
		@@ -59,3 +59,100 @@ void helper_bndck(CPUX86State *env, uint32_t fail)
		raise_exception_ra(env, EXCP05_BOUND, GETPC());
		}
		}

		static uint64_t lookup_bte64(CPUX86State *env, uint64_t base, uintptr_t ra)
		{
		uint64_t bndcsr, bde, bt;

		if ((env->hflags & HF_CPL_MASK) == 3) {
		bndcsr = env->bndcs_regs.cfgu;
		} else {
		bndcsr = env->msr_bndcfgs;
		}

		bde = (extract64(base, 20, 28) << 3) + (extract64(bndcsr, 20, 44) << 12);
		bt = cpu_ldq_data_ra(env, bde, ra);
		if ((bt & 1) == 0) {
		env->bndcs_regs.sts = bde \| 2;
		raise_exception_ra(env, EXCP05_BOUND, ra);
		}

		return (extract64(base, 3, 17) << 5) + (bt & ~7);
		}

		static uint32_t lookup_bte32(CPUX86State *env, uint32_t base, uintptr_t ra)
		{
		uint32_t bndcsr, bde, bt;

		if ((env->hflags & HF_CPL_MASK) == 3) {
		bndcsr = env->bndcs_regs.cfgu;
		} else {
		bndcsr = env->msr_bndcfgs;
		}

		bde = (extract32(base, 12, 20) << 2) + (bndcsr & TARGET_PAGE_MASK);
		bt = cpu_ldl_data_ra(env, bde, ra);
		if ((bt & 1) == 0) {
		env->bndcs_regs.sts = bde \| 2;
		raise_exception_ra(env, EXCP05_BOUND, ra);
		}

		return (extract32(base, 2, 10) << 4) + (bt & ~3);
		}

		uint64_t helper_bndldx64(CPUX86State *env, target_ulong base, target_ulong ptr)
		{
		uintptr_t ra = GETPC();
		uint64_t bte, lb, ub, pt;

		bte = lookup_bte64(env, base, ra);
		lb = cpu_ldq_data_ra(env, bte, ra);
		ub = cpu_ldq_data_ra(env, bte + 8, ra);
		pt = cpu_ldq_data_ra(env, bte + 16, ra);

		if (pt != ptr) {
		lb = ub = 0;
		}
		env->mmx_t0.MMX_Q(0) = ub;
		return lb;
		}

		uint64_t helper_bndldx32(CPUX86State *env, target_ulong base, target_ulong ptr)
		{
		uintptr_t ra = GETPC();
		uint32_t bte, lb, ub, pt;

		bte = lookup_bte32(env, base, ra);
		lb = cpu_ldl_data_ra(env, bte, ra);
		ub = cpu_ldl_data_ra(env, bte + 4, ra);
		pt = cpu_ldl_data_ra(env, bte + 8, ra);

		if (pt != ptr) {
		lb = ub = 0;
		}
		return ((uint64_t)ub << 32) \| lb;
		}

		void helper_bndstx64(CPUX86State *env, target_ulong base, target_ulong ptr,
		uint64_t lb, uint64_t ub)
		{
		uintptr_t ra = GETPC();
		uint64_t bte;

		bte = lookup_bte64(env, base, ra);
		cpu_stq_data_ra(env, bte, lb, ra);
		cpu_stq_data_ra(env, bte + 8, ub, ra);
		cpu_stq_data_ra(env, bte + 16, ptr, ra);
		}

		void helper_bndstx32(CPUX86State *env, target_ulong base, target_ulong ptr,
		uint64_t lb, uint64_t ub)
		{
		uintptr_t ra = GETPC();
		uint32_t bte;

		bte = lookup_bte32(env, base, ra);
		cpu_stl_data_ra(env, bte, lb, ra);
		cpu_stl_data_ra(env, bte + 4, ub, ra);
		cpu_stl_data_ra(env, bte + 8, ptr, ra);
		}

target-i386/translate.c

+57 −0

Original line number	Diff line number	Diff line
		@@ -7511,6 +7511,36 @@ static target_ulong disas_insn(CPUX86State env, DisasContext s,
		/* bnd registers are now in-use */
		gen_set_hflag(s, HF_MPX_IU_MASK);
		}
		} else if (mod != 3) {
		/* bndldx */
		AddressParts a = gen_lea_modrm_0(env, s, modrm);
		if (reg >= 4
		\|\| (prefixes & PREFIX_LOCK)
		\|\| s->aflag == MO_16
		\|\| a.base < -1) {
		goto illegal_op;
		}
		if (a.base >= 0) {
		tcg_gen_addi_tl(cpu_A0, cpu_regs[a.base], a.disp);
		} else {
		tcg_gen_movi_tl(cpu_A0, 0);
		}
		gen_lea_v_seg(s, s->aflag, cpu_A0, a.def_seg, s->override);
		if (a.index >= 0) {
		tcg_gen_mov_tl(cpu_T0, cpu_regs[a.index]);
		} else {
		tcg_gen_movi_tl(cpu_T0, 0);
		}
		if (CODE64(s)) {
		gen_helper_bndldx64(cpu_bndl[reg], cpu_env, cpu_A0, cpu_T0);
		tcg_gen_ld_i64(cpu_bndu[reg], cpu_env,
		offsetof(CPUX86State, mmx_t0.MMX_Q(0)));
		} else {
		gen_helper_bndldx32(cpu_bndu[reg], cpu_env, cpu_A0, cpu_T0);
		tcg_gen_ext32u_i64(cpu_bndl[reg], cpu_bndu[reg]);
		tcg_gen_shri_i64(cpu_bndu[reg], cpu_bndu[reg], 32);
		}
		gen_set_hflag(s, HF_MPX_IU_MASK);
		}
		}
		gen_nop_modrm(env, s, modrm);
		@@ -7586,6 +7616,33 @@ static target_ulong disas_insn(CPUX86State env, DisasContext s,
		s->mem_index, MO_LEUL);
		}
		}
		} else if (mod != 3) {
		/* bndstx */
		AddressParts a = gen_lea_modrm_0(env, s, modrm);
		if (reg >= 4
		\|\| (prefixes & PREFIX_LOCK)
		\|\| s->aflag == MO_16
		\|\| a.base < -1) {
		goto illegal_op;
		}
		if (a.base >= 0) {
		tcg_gen_addi_tl(cpu_A0, cpu_regs[a.base], a.disp);
		} else {
		tcg_gen_movi_tl(cpu_A0, 0);
		}
		gen_lea_v_seg(s, s->aflag, cpu_A0, a.def_seg, s->override);
		if (a.index >= 0) {
		tcg_gen_mov_tl(cpu_T0, cpu_regs[a.index]);
		} else {
		tcg_gen_movi_tl(cpu_T0, 0);
		}
		if (CODE64(s)) {
		gen_helper_bndstx64(cpu_env, cpu_A0, cpu_T0,
		cpu_bndl[reg], cpu_bndu[reg]);
		} else {
		gen_helper_bndstx32(cpu_env, cpu_A0, cpu_T0,
		cpu_bndl[reg], cpu_bndu[reg]);
		}
		}
		}
		gen_nop_modrm(env, s, modrm);