Commit bba5ed77 authored by Isaku Yamahata's avatar Isaku Yamahata Committed by Michael S. Tsirkin
Browse files

pcie/port: fix bridge control register wmask 



pci generic layer initialized wmask for bridge control register
according to pci spec. pcie deviates slightly from it,
so initialize it properly.

Signed-off-by: default avatarIsaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
parent f6bdfcc9

hw/pcie_port.c

+8 −0
Original line number Diff line number Diff line
@@ -27,6 +27,14 @@ void pcie_port_init_reg(PCIDevice *d) 
    pci_set_word(d->config + PCI_STATUS, 0);

    pci_set_word(d->config + PCI_SEC_STATUS, 0);



    /* Unlike conventional pci bridge, some bits are hardwared to 0. */

    pci_set_word(d->wmask + PCI_BRIDGE_CONTROL,

                 PCI_BRIDGE_CTL_PARITY |

                 PCI_BRIDGE_CTL_ISA |

                 PCI_BRIDGE_CTL_VGA |

                 PCI_BRIDGE_CTL_SERR |

                 PCI_BRIDGE_CTL_BUS_RESET);



    /* 7.5.3.5 Prefetchable Memory Base Limit

     * The Prefetchable Memory Base and Prefetchable Memory Limit registers

     * must indicate that 64-bit addresses are supported, as defined in