Commit bb03fd84 authored by David Hildenbrand's avatar David Hildenbrand
Browse files

s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BIT 



1. We'll reuse op_vcdg() for similar instructions later, prepare for
   that.
2. We'll reuse vop64_2() later for other instructions.

We have to mangle the erm (effective rounding mode) and the m4 into
the simd_data(), and properly unmangle them again.

Make sure to restore the erm before triggering an exception.

Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarDavid Hildenbrand <david@redhat.com>
parent 2c806ab4

target/s390x/helper.h

+2 −0
Original line number Diff line number Diff line
@@ -266,6 +266,8 @@ DEF_HELPER_FLAGS_5(gvec_vfche64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32 
DEF_HELPER_FLAGS_5(gvec_vfche64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)

DEF_HELPER_5(gvec_vfche64_cc, void, ptr, cptr, cptr, env, i32)

DEF_HELPER_5(gvec_vfche64s_cc, void, ptr, cptr, cptr, env, i32)

DEF_HELPER_FLAGS_4(gvec_vcdg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)

DEF_HELPER_FLAGS_4(gvec_vcdg64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)



#ifndef CONFIG_USER_ONLY

DEF_HELPER_3(servc, i32, env, i64, i64)

target/s390x/insn-data.def

+2 −0
Original line number Diff line number Diff line
@@ -1218,6 +1218,8 @@ 
    F(0xe7eb, VFCH,    VRR_c, V,   0, 0, 0, 0, vfc, 0, IF_VEC)

/* VECTOR FP COMPARE HIGH OR EQUAL */

    F(0xe7ea, VFCHE,   VRR_c, V,   0, 0, 0, 0, vfc, 0, IF_VEC)

/* VECTOR FP CONVERT FROM FIXED 64-BIT */

    F(0xe7c3, VCDG,    VRR_a, V,   0, 0, 0, 0, vcdg, 0, IF_VEC)



#ifndef CONFIG_USER_ONLY

/* COMPARE AND SWAP AND PURGE */

target/s390x/translate_vx.inc.c

+25 −0
Original line number Diff line number Diff line
@@ -2639,3 +2639,28 @@ static DisasJumpType op_vfc(DisasContext *s, DisasOps *o) 
    }

    return DISAS_NEXT;

}



static DisasJumpType op_vcdg(DisasContext *s, DisasOps *o)

{

    const uint8_t fpf = get_field(s->fields, m3);

    const uint8_t m4 = get_field(s->fields, m4);

    const uint8_t erm = get_field(s->fields, m5);

    const bool se = extract32(m4, 3, 1);

    gen_helper_gvec_2_ptr *fn;



    if (fpf != FPF_LONG || extract32(m4, 0, 2) || erm > 7 || erm == 2) {

        gen_program_exception(s, PGM_SPECIFICATION);

        return DISAS_NORETURN;

    }



    switch (s->fields->op2) {

    case 0xc3:

        fn = se ? gen_helper_gvec_vcdg64s : gen_helper_gvec_vcdg64;

        break;

    default:

        g_assert_not_reached();

    }

    gen_gvec_2_ptr(get_field(s->fields, v1), get_field(s->fields, v2), cpu_env,

                   deposit32(m4, 4, 4, erm), fn);

    return DISAS_NEXT;

}

target/s390x/vec_fpu_helper.c

+47 −0
Original line number Diff line number Diff line
@@ -78,6 +78,30 @@ static void handle_ieee_exc(CPUS390XState *env, uint8_t vxc, uint8_t vec_exc, 
    }

}



typedef uint64_t (*vop64_2_fn)(uint64_t a, float_status *s);

static void vop64_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,

                    bool s, bool XxC, uint8_t erm, vop64_2_fn fn,

                    uintptr_t retaddr)

{

    uint8_t vxc, vec_exc = 0;

    S390Vector tmp = {};

    int i, old_mode;



    old_mode = s390_swap_bfp_rounding_mode(env, erm);

    for (i = 0; i < 2; i++) {

        const uint64_t a = s390_vec_read_element64(v2, i);



        s390_vec_write_element64(&tmp, i, fn(a, &env->fpu_status));

        vxc = check_ieee_exc(env, i, XxC, &vec_exc);

        if (s || vxc) {

            break;

        }

    }

    s390_restore_bfp_rounding_mode(env, old_mode);

    handle_ieee_exc(env, vxc, vec_exc, retaddr);

    *v1 = tmp;

}



typedef uint64_t (*vop64_3_fn)(uint64_t a, uint64_t b, float_status *s);

static void vop64_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,

                    CPUS390XState *env, bool s, vop64_3_fn fn,
@@ -253,3 +277,26 @@ void HELPER(gvec_vfche64s_cc)(void *v1, const void *v2, const void *v3, 
{

    env->cc_op = vfc64(v1, v2, v3, env, true, float64_le_quiet, GETPC());

}



static uint64_t vcdg64(uint64_t a, float_status *s)

{

    return int64_to_float64(a, s);

}



void HELPER(gvec_vcdg64)(void *v1, const void *v2, CPUS390XState *env,

                         uint32_t desc)

{

    const uint8_t erm = extract32(simd_data(desc), 4, 4);

    const bool XxC = extract32(simd_data(desc), 2, 1);



    vop64_2(v1, v2, env, false, XxC, erm, vcdg64, GETPC());

}



void HELPER(gvec_vcdg64s)(void *v1, const void *v2, CPUS390XState *env,

                          uint32_t desc)

{

    const uint8_t erm = extract32(simd_data(desc), 4, 4);

    const bool XxC = extract32(simd_data(desc), 2, 1);



    vop64_2(v1, v2, env, true, XxC, erm, vcdg64, GETPC());

}