Commit ba51ef25 authored by Mark Cave-Ayland's avatar Mark Cave-Ayland
Browse files

sun4m: move sun4m_iommu.c from hw/dma to hw/sparc 



This seems more appropriate and brings sun4m in line with the other
architectures.

Signed-off-by: default avatarMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: default avatarArtyom Tarasenko <atar4qemu@gmail.com>
parent 69520948

hw/dma/Makefile.objs

+0 −1
Original line number Diff line number Diff line
@@ -8,7 +8,6 @@ common-obj-$(CONFIG_XILINX_AXI) += xilinx_axidma.o 
common-obj-$(CONFIG_ZYNQ_DEVCFG) += xlnx-zynq-devcfg.o

common-obj-$(CONFIG_ETRAXFS) += etraxfs_dma.o

common-obj-$(CONFIG_STP2000) += sparc32_dma.o

common-obj-$(CONFIG_SUN4M) += sun4m_iommu.o

obj-$(CONFIG_XLNX_ZYNQMP) += xlnx_dpdma.o



obj-$(CONFIG_OMAP) += omap_dma.o soc_dma.o

hw/dma/trace-events

+0 −10
Original line number Diff line number Diff line
@@ -18,15 +18,5 @@ sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg 
sparc32_dma_enable_raise(void) "Raise DMA enable"

sparc32_dma_enable_lower(void) "Lower DMA enable"



# hw/dma/sun4m_iommu.c

sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"

sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"

sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = 0x%"PRIx64

sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush 0x%x"

sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush 0x%x"

sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr 0x%"PRIx64" => pte 0x%"PRIx64", *pte = 0x%x"

sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva 0x%"PRIx64" => pa 0x%"PRIx64" iopte = 0x%x"

sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64



# hw/dma/i8257.c

i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d"

hw/sparc/Makefile.objs

+1 −1
Original line number Diff line number Diff line 
obj-y += sun4m.o leon3.o
 
obj-y += sun4m_iommu.o sun4m.o leon3.o

hw/dma/sun4m_iommu.c→hw/sparc/sun4m_iommu.c

+6 −5
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@ 


#define IOMMU_PAGE_SHIFT    12

#define IOMMU_PAGE_SIZE     (1 << IOMMU_PAGE_SHIFT)

#define IOMMU_PAGE_MASK     ~(IOMMU_PAGE_SIZE - 1)

#define IOMMU_PAGE_MASK     (~(IOMMU_PAGE_SIZE - 1))



static uint64_t iommu_mem_read(void *opaque, hwaddr addr,

                               unsigned size)
@@ -218,8 +218,8 @@ static void iommu_mem_write(void *opaque, hwaddr addr, 
        s->regs[saddr] = val & IOMMU_SBCFG_MASK;

        break;

    case IOMMU_ARBEN:

        // XXX implement SBus probing: fault when reading unmapped

        // addresses, fault cause and address stored to MMU/IOMMU

        /* XXX implement SBus probing: fault when reading unmapped

           addresses, fault cause and address stored to MMU/IOMMU */

        s->regs[saddr] = (val & IOMMU_ARBEN_MASK) | IOMMU_MID;

        break;

    case IOMMU_MASK_ID:
@@ -272,8 +272,9 @@ static void iommu_bad_addr(IOMMUState *s, hwaddr addr, 
    trace_sun4m_iommu_bad_addr(addr);

    s->regs[IOMMU_AFSR] = IOMMU_AFSR_ERR | IOMMU_AFSR_LE | IOMMU_AFSR_RESV |

        IOMMU_AFSR_FAV;

    if (!is_write)

    if (!is_write) {

        s->regs[IOMMU_AFSR] |= IOMMU_AFSR_RD;

    }

    s->regs[IOMMU_AFAR] = addr;

    qemu_irq_raise(s->irq);

}

hw/sparc/trace-events

+10 −0
Original line number Diff line number Diff line
@@ -6,6 +6,16 @@ sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" 
sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"

sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"



# hw/sparc/sun4m_iommu.c

sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"

sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"

sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = 0x%"PRIx64

sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush 0x%x"

sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush 0x%x"

sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr 0x%"PRIx64" => pte 0x%"PRIx64", *pte = 0x%x"

sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva 0x%"PRIx64" => pa 0x%"PRIx64" iopte = 0x%x"

sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64



# hw/sparc/leon3.c

leon3_set_irq(int intno) "Set CPU IRQ %d"

leon3_reset_irq(int intno) "Reset CPU IRQ %d"