Commit b8b3e756 authored by Anthony Liguori's avatar Anthony Liguori
Browse files

Merge remote-tracking branch 'qemu-kvm/memory/urgent' into staging 

* qemu-kvm/memory/urgent: (42 commits)
  memory: check for watchpoints when getting code ram_addr
  exec: fix write tlb entry misused as iotlb
  Sparc: avoid AREG0 wrappers for memory access helpers
  Sparc: avoid AREG0 for memory access helpers
  TCG: add 5 arg helpers to def-helper.h
  softmmu templates: optionally pass CPUState to memory access functions
  i386: Remove REGPARM
  sparc64: implement PCI and ISA irqs
  sparc: reset CPU state on reset
  apb: use normal PCI device header for PBM device
  w64: Fix data type of next_tb and tcg_qemu_tb_exec
  softfloat: fix for C99
  vmstate: fix varrays with uint32_t indexes
  Fix large memory chunks allocation with tcg_malloc.
  hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region
  hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device state
  hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device state
  ARM: Remove unnecessary subpage workarounds
  malta: Fix display for LED array
  malta: Use symbolic hardware addresses
  ...
parents 5c20f4e5 32b08980

Makefile.target

+9 −3
Original line number Diff line number Diff line
@@ -80,7 +80,10 @@ libobj-y = exec.o translate-all.o cpu-exec.o translate.o 
libobj-y += tcg/tcg.o tcg/optimize.o

libobj-$(CONFIG_TCG_INTERPRETER) += tci.o

libobj-y += fpu/softfloat.o

libobj-y += op_helper.o helper.o

ifneq ($(TARGET_BASE_ARCH), sparc)

libobj-y += op_helper.o

endif

libobj-y += helper.o

ifeq ($(TARGET_BASE_ARCH), i386)

libobj-y += cpuid.o

endif
@@ -101,9 +104,12 @@ tci-dis.o: QEMU_CFLAGS += -I$(SRC_PATH)/tcg -I$(SRC_PATH)/tcg/tci 


$(libobj-y): $(GENERATED_HEADERS)



# HELPER_CFLAGS is used for all the code compiled with static register

# HELPER_CFLAGS is used for all the legacy code compiled with static register

# variables

op_helper.o ldst_helper.o user-exec.o: QEMU_CFLAGS += $(HELPER_CFLAGS)

ifneq ($(TARGET_BASE_ARCH), sparc)

op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)

endif

user-exec.o: QEMU_CFLAGS += $(HELPER_CFLAGS)



# Note: this is a workaround. The real fix is to avoid compiling

# cpu_signal_handler() in user-exec.c.

configure

+7 −0
Original line number Diff line number Diff line
@@ -3606,6 +3606,13 @@ case "$target_arch2" in 
    exit 1

  ;;

esac



case "$target_arch2" in

  sparc*)

    echo "CONFIG_TCG_PASS_AREG0=y" >> $config_target_mak

  ;;

esac



echo "TARGET_SHORT_ALIGNMENT=$target_short_alignment" >> $config_target_mak

echo "TARGET_INT_ALIGNMENT=$target_int_alignment" >> $config_target_mak

echo "TARGET_LONG_ALIGNMENT=$target_long_alignment" >> $config_target_mak

cpu-all.h

+9 −0
Original line number Diff line number Diff line
@@ -259,12 +259,21 @@ extern unsigned long reserved_va; 
#define stfl(p, v) stfl_raw(p, v)

#define stfq(p, v) stfq_raw(p, v)



#ifndef CONFIG_TCG_PASS_AREG0

#define ldub_code(p) ldub_raw(p)

#define ldsb_code(p) ldsb_raw(p)

#define lduw_code(p) lduw_raw(p)

#define ldsw_code(p) ldsw_raw(p)

#define ldl_code(p) ldl_raw(p)

#define ldq_code(p) ldq_raw(p)

#else

#define cpu_ldub_code(env1, p) ldub_raw(p)

#define cpu_ldsb_code(env1, p) ldsb_raw(p)

#define cpu_lduw_code(env1, p) lduw_raw(p)

#define cpu_ldsw_code(env1, p) ldsw_raw(p)

#define cpu_ldl_code(env1, p) ldl_raw(p)

#define cpu_ldq_code(env1, p) ldq_raw(p)

#endif



#define ldub_kernel(p) ldub_raw(p)

#define ldsb_kernel(p) ldsb_raw(p)

cpu-exec.c

+3 −3
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ void cpu_resume_from_signal(CPUArchState *env, void *puc) 
static void cpu_exec_nocache(CPUArchState *env, int max_cycles,

                             TranslationBlock *orig_tb)

{

    unsigned long next_tb;

    tcg_target_ulong next_tb;

    TranslationBlock *tb;



    /* Should never happen.
@@ -186,7 +186,7 @@ int cpu_exec(CPUArchState *env) 
    int ret, interrupt_request;

    TranslationBlock *tb;

    uint8_t *tc_ptr;

    unsigned long next_tb;

    tcg_target_ulong next_tb;



    if (env->halted) {

        if (!cpu_has_work(env)) {
@@ -565,7 +565,7 @@ int cpu_exec(CPUArchState *env) 
                    if ((next_tb & 3) == 2) {

                        /* Instruction counter expired.  */

                        int insns_left;

                        tb = (TranslationBlock *)(long)(next_tb & ~3);

                        tb = (TranslationBlock *)(next_tb & ~3);

                        /* Restore PC.  */

                        cpu_pc_from_tb(env, tb);

                        insns_left = env->icount_decr.u32;

def-helper.h

+26 −0
Original line number Diff line number Diff line
@@ -118,6 +118,8 @@ 
    DEF_HELPER_FLAGS_3(name, 0, ret, t1, t2, t3)

#define DEF_HELPER_4(name, ret, t1, t2, t3, t4) \

    DEF_HELPER_FLAGS_4(name, 0, ret, t1, t2, t3, t4)

#define DEF_HELPER_5(name, ret, t1, t2, t3, t4, t5) \

    DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5)



#endif /* DEF_HELPER_H */
@@ -140,6 +142,10 @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3)); 
dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \

                                   dh_ctype(t4));



#define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \

dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \

                            dh_ctype(t4), dh_ctype(t5));



#undef GEN_HELPER

#define GEN_HELPER -1
@@ -203,6 +209,22 @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) dh_arg_decl(t1, 1 
  tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 4, args); \

}



#define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \

static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \

    dh_arg_decl(t1, 1),  dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \

    dh_arg_decl(t4, 4), dh_arg_decl(t5, 5)) \

{ \

  TCGArg args[5]; \

  int sizemask = 0; \

  dh_sizemask(ret, 0); \

  dh_arg(t1, 1); \

  dh_arg(t2, 2); \

  dh_arg(t3, 3); \

  dh_arg(t4, 4); \

  dh_arg(t5, 5); \

  tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 5, args); \

}



#undef GEN_HELPER

#define GEN_HELPER -1
@@ -224,6 +246,9 @@ DEF_HELPER_FLAGS_0(name, flags, ret) 
#define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \

DEF_HELPER_FLAGS_0(name, flags, ret)



#define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \

DEF_HELPER_FLAGS_0(name, flags, ret)



#undef GEN_HELPER

#define GEN_HELPER -1
@@ -235,6 +260,7 @@ DEF_HELPER_FLAGS_0(name, flags, ret) 
#undef DEF_HELPER_FLAGS_2

#undef DEF_HELPER_FLAGS_3

#undef DEF_HELPER_FLAGS_4

#undef DEF_HELPER_FLAGS_5

#undef GEN_HELPER



#endif