Commit b87eef31 authored by Mateja Marjanovic's avatar Mateja Marjanovic Committed by Aleksandar Markovic
Browse files

target/mips: Add emulation of MMI instruction PCPYLD 



Add emulation of MMI instruction PCPYLD. The emulation is implemented
using TCG front end operations directly to achieve better performance.

Signed-off-by: default avatarMateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: default avatarAleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: default avatarAleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551712405-2530-3-git-send-email-mateja.marjanovic@rt-rk.com>
parent d3434d9f

target/mips/translate.c

+42 −1
Original line number Diff line number Diff line
@@ -24419,6 +24419,45 @@ static void gen_mmi_pcpyh(DisasContext *ctx) 
    }

}









/*









 *  PCPYLD rd, rs, rt









 *









 *    Parallel Copy Lower Doubleword









 *









 *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0









 *  +-----------+---------+---------+---------+---------+-----------+









 *  |    MMI    |   rs    |   rt    |   rd    | PCPYLD  |    MMI2   |









 *  +-----------+---------+---------+---------+---------+-----------+









 */









static void gen_mmi_pcpyld(DisasContext *ctx)









{









    uint32_t rs, rt, rd;









    uint32_t opcode;

















    opcode = ctx->opcode;

















    rs = extract32(opcode, 21, 5);









    rt = extract32(opcode, 16, 5);









    rd = extract32(opcode, 11, 5);

















    if (rd == 0) {









        /* nop */









    } else {









        if (rs == 0) {









            tcg_gen_movi_i64(cpu_mmr[rd], 0);









        } else {









            tcg_gen_mov_i64(cpu_mmr[rd], cpu_gpr[rs]);









        }









        if (rt == 0) {









            tcg_gen_movi_i64(cpu_gpr[rd], 0);









        } else {









            if (rd != rt) {









                tcg_gen_mov_i64(cpu_gpr[rd], cpu_gpr[rt]);









            }









        }









    }









}

















#endif
























@@ -27433,7 +27472,6 @@ static void decode_mmi2(CPUMIPSState *env, DisasContext *ctx)







    case MMI_OPC_2_PINTH:     /* TODO: MMI_OPC_2_PINTH */









    case MMI_OPC_2_PMULTW:    /* TODO: MMI_OPC_2_PMULTW */









    case MMI_OPC_2_PDIVW:     /* TODO: MMI_OPC_2_PDIVW */









    case MMI_OPC_2_PCPYLD:    /* TODO: MMI_OPC_2_PCPYLD */









    case MMI_OPC_2_PMADDH:    /* TODO: MMI_OPC_2_PMADDH */









    case MMI_OPC_2_PHMADH:    /* TODO: MMI_OPC_2_PHMADH */









    case MMI_OPC_2_PAND:      /* TODO: MMI_OPC_2_PAND */








@@ -27448,6 +27486,9 @@ static void decode_mmi2(CPUMIPSState *env, DisasContext *ctx)







    case MMI_OPC_2_PROT3W:    /* TODO: MMI_OPC_2_PROT3W */









        generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI2 */









        break;









    case MMI_OPC_2_PCPYLD:









        gen_mmi_pcpyld(ctx);









        break;









    default:









        MIPS_INVAL("TX79 MMI class MMI2");









        generate_exception_end(ctx, EXCP_RI);