Commit b7d255e1 authored by Philippe Mathieu-Daudé's avatar Philippe Mathieu-Daudé
Browse files

hw/pci-host/piix: Extract piix3_create() 



Extract the PIIX3 creation code from the i440fx_init() function.

Reviewed-by: default avatarAleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: default avatarEsteban Bosse <estebanbosse@gmail.com>
Signed-off-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
parent 8ce60a75

hw/pci-host/piix.c

+31 −20
Original line number Diff line number Diff line
@@ -331,6 +331,36 @@ static void i440fx_realize(PCIDevice *dev, Error **errp) 
    }

}



static PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus)

{

    PIIX3State *piix3;

    PCIDevice *pci_dev;



    /*

     * Xen supports additional interrupt routes from the PCI devices to

     * the IOAPIC: the four pins of each PCI device on the bus are also

     * connected to the IOAPIC directly.

     * These additional routes can be discovered through ACPI.

     */

    if (xen_enabled()) {

        pci_dev = pci_create_simple_multifunction(pci_bus, -1, true,

                                                  TYPE_PIIX3_XEN_DEVICE);

        piix3 = PIIX3_PCI_DEVICE(pci_dev);

        pci_bus_irqs(pci_bus, xen_piix3_set_irq, xen_pci_slot_get_pirq,

                     piix3, XEN_PIIX_NUM_PIRQS);

    } else {

        pci_dev = pci_create_simple_multifunction(pci_bus, -1, true,

                                                  TYPE_PIIX3_DEVICE);

        piix3 = PIIX3_PCI_DEVICE(pci_dev);

        pci_bus_irqs(pci_bus, piix3_set_irq, pci_slot_get_pirq,

                     piix3, PIIX_NUM_PIRQS);

        pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq);

    }

    *isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0"));



    return piix3;

}



PCIBus *i440fx_init(const char *host_type, const char *pci_type,

                    PCII440FXState **pi440fx_state,

                    int *piix3_devfn,
@@ -400,27 +430,8 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type, 
                 PAM_EXPAN_SIZE);

    }



    /* Xen supports additional interrupt routes from the PCI devices to

     * the IOAPIC: the four pins of each PCI device on the bus are also

     * connected to the IOAPIC directly.

     * These additional routes can be discovered through ACPI. */

    if (xen_enabled()) {

        PCIDevice *pci_dev = pci_create_simple_multifunction(b,

                             -1, true, TYPE_PIIX3_XEN_DEVICE);

        piix3 = PIIX3_PCI_DEVICE(pci_dev);

        pci_bus_irqs(b, xen_piix3_set_irq, xen_pci_slot_get_pirq,

                piix3, XEN_PIIX_NUM_PIRQS);

    } else {

        PCIDevice *pci_dev = pci_create_simple_multifunction(b,

                             -1, true, TYPE_PIIX3_DEVICE);

        piix3 = PIIX3_PCI_DEVICE(pci_dev);

        pci_bus_irqs(b, piix3_set_irq, pci_slot_get_pirq, piix3,

                PIIX_NUM_PIRQS);

        pci_bus_set_route_irq_fn(b, piix3_route_intx_pin_to_irq);

    }

    piix3 = piix3_create(b, isa_bus);

    piix3->pic = pic;

    *isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0"));



    *piix3_devfn = piix3->dev.devfn;



    ram_size = ram_size / 8 / 1024 / 1024;