Commit b7910472 authored by Peter Xu's avatar Peter Xu Committed by Michael S. Tsirkin
Browse files

intel_iommu: allow queued invalidation for IR 



Queued invalidation is required for IR. This patch add basic support for
interrupt cache invalidate requests. Since we currently have no IR cache
implemented yet, we can just skip all interrupt cache invalidation
requests for now.

Signed-off-by: default avatarPeter Xu <peterx@redhat.com>
Reviewed-by: default avatarMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
parent d46114f9

hw/i386/intel_iommu.c

+9 −0
Original line number Diff line number Diff line
@@ -1404,6 +1404,15 @@ static bool vtd_process_inv_desc(IntelIOMMUState *s) 
        }

        break;



    case VTD_INV_DESC_IEC:

        VTD_DPRINTF(INV, "Interrupt Entry Cache Invalidation "

                    "not implemented yet");

        /*

         * Since currently we do not cache interrupt entries, we can

         * just mark this descriptor as "good" and move on.

         */

        break;



    default:

        VTD_DPRINTF(GENERAL, "error: unkonw Invalidation Descriptor type "

                    "hi 0x%"PRIx64 " lo 0x%"PRIx64 " type %"PRIu8,

hw/i386/intel_iommu_internal.h

+2 −0
Original line number Diff line number Diff line
@@ -286,6 +286,8 @@ typedef struct VTDInvDesc VTDInvDesc; 
#define VTD_INV_DESC_TYPE               0xf

#define VTD_INV_DESC_CC                 0x1 /* Context-cache Invalidate Desc */

#define VTD_INV_DESC_IOTLB              0x2

#define VTD_INV_DESC_IEC                0x4 /* Interrupt Entry Cache

                                               Invalidate Descriptor */

#define VTD_INV_DESC_WAIT               0x5 /* Invalidation Wait Descriptor */

#define VTD_INV_DESC_NONE               0   /* Not an Invalidate Descriptor */