Commit b66f6b99 authored by Peter Maydell's avatar Peter Maydell
Browse files

target/arm: Stop using deprecated functions in NEON_2RM_VCVT_F32_F16 



Remove some old constructns from NEON_2RM_VCVT_F16_F32 code:
 * don't use CPU_F0s
 * don't use tcg_gen_st_f32

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Tested-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190613163917.28589-12-peter.maydell@linaro.org
parent 58f2682e

target/arm/translate.c

+11 −15
Original line number Diff line number Diff line
@@ -1542,8 +1542,6 @@ static TCGv_ptr vfp_reg_ptr(bool dp, int reg) 
    return ret;

}



#define tcg_gen_st_f32 tcg_gen_st_i32



#define ARM_CP_RW_BIT   (1 << 20)



/* Include the VFP decoder */
@@ -6460,20 +6458,18 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) 
                    tmp = neon_load_reg(rm, 0);

                    tmp2 = neon_load_reg(rm, 1);

                    tcg_gen_ext16u_i32(tmp3, tmp);

                    gen_helper_vfp_fcvt_f16_to_f32(cpu_F0s, tmp3, fpst, ahp);

                    tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 0));

                    tcg_gen_shri_i32(tmp3, tmp, 16);

                    gen_helper_vfp_fcvt_f16_to_f32(cpu_F0s, tmp3, fpst, ahp);

                    tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 1));

                    tcg_temp_free_i32(tmp);

                    gen_helper_vfp_fcvt_f16_to_f32(tmp3, tmp3, fpst, ahp);

                    neon_store_reg(rd, 0, tmp3);

                    tcg_gen_shri_i32(tmp, tmp, 16);

                    gen_helper_vfp_fcvt_f16_to_f32(tmp, tmp, fpst, ahp);

                    neon_store_reg(rd, 1, tmp);

                    tmp3 = tcg_temp_new_i32();

                    tcg_gen_ext16u_i32(tmp3, tmp2);

                    gen_helper_vfp_fcvt_f16_to_f32(cpu_F0s, tmp3, fpst, ahp);

                    tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 2));

                    tcg_gen_shri_i32(tmp3, tmp2, 16);

                    gen_helper_vfp_fcvt_f16_to_f32(cpu_F0s, tmp3, fpst, ahp);

                    tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 3));

                    tcg_temp_free_i32(tmp2);

                    tcg_temp_free_i32(tmp3);

                    gen_helper_vfp_fcvt_f16_to_f32(tmp3, tmp3, fpst, ahp);

                    neon_store_reg(rd, 2, tmp3);

                    tcg_gen_shri_i32(tmp2, tmp2, 16);

                    gen_helper_vfp_fcvt_f16_to_f32(tmp2, tmp2, fpst, ahp);

                    neon_store_reg(rd, 3, tmp2);

                    tcg_temp_free_i32(ahp);

                    tcg_temp_free_ptr(fpst);

                    break;