Loading target-sparc/translate.c +4 −1 Original line number Diff line number Diff line Loading @@ -4679,12 +4679,15 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) case 0xd: /* ldstub -- XXX: should be atomically */ { TCGv r_const; TCGv tmp = tcg_temp_new(); gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld8u(cpu_val, cpu_addr, dc->mem_idx); tcg_gen_qemu_ld8u(tmp, cpu_addr, dc->mem_idx); r_const = tcg_const_tl(0xff); tcg_gen_qemu_st8(r_const, cpu_addr, dc->mem_idx); tcg_gen_mov_tl(cpu_val, tmp); tcg_temp_free(r_const); tcg_temp_free(tmp); } break; case 0x0f: Loading Loading
target-sparc/translate.c +4 −1 Original line number Diff line number Diff line Loading @@ -4679,12 +4679,15 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) case 0xd: /* ldstub -- XXX: should be atomically */ { TCGv r_const; TCGv tmp = tcg_temp_new(); gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld8u(cpu_val, cpu_addr, dc->mem_idx); tcg_gen_qemu_ld8u(tmp, cpu_addr, dc->mem_idx); r_const = tcg_const_tl(0xff); tcg_gen_qemu_st8(r_const, cpu_addr, dc->mem_idx); tcg_gen_mov_tl(cpu_val, tmp); tcg_temp_free(r_const); tcg_temp_free(tmp); } break; case 0x0f: Loading