Commit b59821a9 authored by Peter Maydell's avatar Peter Maydell
Browse files

memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 



Rename memory_region_init_rom() to memory_region_init_rom_nomigrate()
and memory_region_init_rom_device() to
memory_region_init_rom_device_nomigrate().

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Message-id: 1499438577-7674-5-git-send-email-peter.maydell@linaro.org
parent 1cfe48c1

hw/arm/aspeed.c

+1 −1
Original line number Diff line number Diff line
@@ -216,7 +216,7 @@ static void aspeed_board_init(MachineState *machine, 
         * SoC and 128MB for the AST2500 SoC, which is twice as big as

         * needed by the flash modules of the Aspeed machines.

         */

        memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom",

        memory_region_init_rom_nomigrate(boot_rom, OBJECT(bmc), "aspeed.boot_rom",

                               fl->size, &error_abort);

        memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,

                                    boot_rom);

hw/arm/fsl-imx25.c

+2 −2
Original line number Diff line number Diff line
@@ -249,7 +249,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) 
    }



    /* initialize 2 x 16 KB ROM */

    memory_region_init_rom(&s->rom[0], NULL,

    memory_region_init_rom_nomigrate(&s->rom[0], NULL,

                           "imx25.rom0", FSL_IMX25_ROM0_SIZE, &err);

    if (err) {

        error_propagate(errp, err);
@@ -257,7 +257,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) 
    }

    memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM0_ADDR,

                                &s->rom[0]);

    memory_region_init_rom(&s->rom[1], NULL,

    memory_region_init_rom_nomigrate(&s->rom[1], NULL,

                           "imx25.rom1", FSL_IMX25_ROM1_SIZE, &err);

    if (err) {

        error_propagate(errp, err);

hw/arm/fsl-imx31.c

+2 −2
Original line number Diff line number Diff line
@@ -219,7 +219,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) 
    }



    /* On a real system, the first 16k is a `secure boot rom' */

    memory_region_init_rom(&s->secure_rom, NULL, "imx31.secure_rom",

    memory_region_init_rom_nomigrate(&s->secure_rom, NULL, "imx31.secure_rom",

                           FSL_IMX31_SECURE_ROM_SIZE, &err);

    if (err) {

        error_propagate(errp, err);
@@ -229,7 +229,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) 
                                &s->secure_rom);



    /* There is also a 16k ROM */

    memory_region_init_rom(&s->rom, NULL, "imx31.rom",

    memory_region_init_rom_nomigrate(&s->rom, NULL, "imx31.rom",

                           FSL_IMX31_ROM_SIZE, &err);

    if (err) {

        error_propagate(errp, err);

hw/arm/fsl-imx6.c

+2 −2
Original line number Diff line number Diff line
@@ -399,7 +399,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) 
                                        FSL_IMX6_ENET_MAC_1588_IRQ));



    /* ROM memory */

    memory_region_init_rom(&s->rom, NULL, "imx6.rom",

    memory_region_init_rom_nomigrate(&s->rom, NULL, "imx6.rom",

                           FSL_IMX6_ROM_SIZE, &err);

    if (err) {

        error_propagate(errp, err);
@@ -409,7 +409,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) 
                                &s->rom);



    /* CAAM memory */

    memory_region_init_rom(&s->caam, NULL, "imx6.caam",

    memory_region_init_rom_nomigrate(&s->caam, NULL, "imx6.caam",

                           FSL_IMX6_CAAM_MEM_SIZE, &err);

    if (err) {

        error_propagate(errp, err);

hw/block/pflash_cfi01.c

+1 −1
Original line number Diff line number Diff line
@@ -743,7 +743,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) 
        return NULL;

#endif



    memory_region_init_rom_device(

    memory_region_init_rom_device_nomigrate(

        &pfl->mem, OBJECT(dev),

        &pflash_cfi01_ops,

        pfl,