Commit b4b6eb77 authored by Alexey Kardashevskiy's avatar Alexey Kardashevskiy Committed by David Gibson
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spapr_iommu: Add root memory region 



We are going to have multiple DMA windows at different offsets on
a PCI bus. For the sake of migration, we will have as many TCE table
objects pre-created as many windows supported.
So we need a way to map windows dynamically onto a PCI bus
when migration of a table is completed but at this stage a TCE table
object does not have access to a PHB to ask it to map a DMA window
backed by just migrated TCE table.

This adds a "root" memory region (UINT64_MAX long) to the TCE object.
This new region is mapped on a PCI bus with enabled overlapping as
there will be one root MR per TCE table, each of them mapped at 0.
The actual IOMMU memory region is a subregion of the root region and
a TCE table enables/disables this subregion and maps it at
the specific offset inside the root MR which is 1:1 mapping of
a PCI address space.

Signed-off-by: default avatarAlexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
Reviewed-by: default avatarThomas Huth <thuth@redhat.com>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent a26fdf39

hw/ppc/spapr_iommu.c

+10 −3
Original line number Diff line number Diff line
@@ -233,11 +233,16 @@ static MemoryRegionIOMMUOps spapr_iommu_ops = { 
static int spapr_tce_table_realize(DeviceState *dev)

{

    sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);

    Object *tcetobj = OBJECT(tcet);

    char tmp[32];



    tcet->fd = -1;

    tcet->need_vfio = false;

    memory_region_init_iommu(&tcet->iommu, OBJECT(dev), &spapr_iommu_ops,

                             "iommu-spapr", 0);

    snprintf(tmp, sizeof(tmp), "tce-root-%x", tcet->liobn);

    memory_region_init(&tcet->root, tcetobj, tmp, UINT64_MAX);



    snprintf(tmp, sizeof(tmp), "tce-iommu-%x", tcet->liobn);

    memory_region_init_iommu(&tcet->iommu, tcetobj, &spapr_iommu_ops, tmp, 0);



    QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list);
@@ -321,6 +326,7 @@ void spapr_tce_table_enable(sPAPRTCETable *tcet, 


    memory_region_set_size(&tcet->iommu,

                           (uint64_t)tcet->nb_table << tcet->page_shift);

    memory_region_add_subregion(&tcet->root, tcet->bus_offset, &tcet->iommu);

}



void spapr_tce_table_disable(sPAPRTCETable *tcet)
@@ -329,6 +335,7 @@ void spapr_tce_table_disable(sPAPRTCETable *tcet) 
        return;

    }



    memory_region_del_subregion(&tcet->root, &tcet->iommu);

    memory_region_set_size(&tcet->iommu, 0);



    spapr_tce_free_table(tcet->table, tcet->fd, tcet->nb_table);
@@ -350,7 +357,7 @@ static void spapr_tce_table_unrealize(DeviceState *dev, Error **errp) 


MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet)

{

    return &tcet->iommu;

    return &tcet->root;

}



static void spapr_tce_reset(DeviceState *dev)

hw/ppc/spapr_pci.c

+3 −3
Original line number Diff line number Diff line
@@ -1470,13 +1470,13 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp) 
        return;

    }



    memory_region_add_subregion_overlap(&sphb->iommu_root, 0,

                                        spapr_tce_get_iommu(tcet), 0);



    /* Register default 32bit DMA window */

    spapr_tce_table_enable(tcet, SPAPR_TCE_PAGE_SHIFT, sphb->dma_win_addr,

                           nb_table);



    memory_region_add_subregion(&sphb->iommu_root, tcet->bus_offset,

                                spapr_tce_get_iommu(tcet));



    sphb->msi = g_hash_table_new_full(g_int_hash, g_int_equal, g_free, g_free);

}

include/hw/ppc/spapr.h

+1 −1
Original line number Diff line number Diff line
@@ -544,7 +544,7 @@ struct sPAPRTCETable { 
    bool bypass;

    bool need_vfio;

    int fd;

    MemoryRegion iommu;

    MemoryRegion root, iommu;

    struct VIOsPAPRDevice *vdev; /* for @bypass migration compatibility only */

    QLIST_ENTRY(sPAPRTCETable) list;

};