Loading target/arm/cpu64.c +3 −0 Original line number Diff line number Diff line Loading @@ -257,6 +257,9 @@ static void aarch64_a72_initfn(Object *obj) cpu->gic_vpribits = 5; cpu->gic_vprebits = 5; define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo); if(kvm_enabled()) { kvm_arm_add_vcpu_properties(obj); } } static void aarch64_kunpeng_920_initfn(Object *obj) Loading Loading
target/arm/cpu64.c +3 −0 Original line number Diff line number Diff line Loading @@ -257,6 +257,9 @@ static void aarch64_a72_initfn(Object *obj) cpu->gic_vpribits = 5; cpu->gic_vprebits = 5; define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo); if(kvm_enabled()) { kvm_arm_add_vcpu_properties(obj); } } static void aarch64_kunpeng_920_initfn(Object *obj) Loading