Commit b299e88d authored by Richard Henderson's avatar Richard Henderson
Browse files

softfloat: Specialize udiv_qrnnd for x86_64 



The ISA has a 128/64-bit division instruction.

Tested-by: default avatarEmilio G. Cota <cota@braap.org>
Tested-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
parent 5dfbc9e4

include/fpu/softfloat-macros.h

+6 −0
Original line number Diff line number Diff line
@@ -637,6 +637,11 @@ static inline uint64_t estimateDiv128To64(uint64_t a0, uint64_t a1, uint64_t b) 
static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t n1,

                                  uint64_t n0, uint64_t d)

{

#if defined(__x86_64__)

    uint64_t q;

    asm("divq %4" : "=a"(q), "=d"(*r) : "0"(n0), "1"(n1), "rm"(d));

    return q;

#else

    uint64_t d0, d1, q0, q1, r1, r0, m;



    d0 = (uint32_t)d;
@@ -676,6 +681,7 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t n1, 


    *r = r0;

    return (q1 << 32) | q0;

#endif

}



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