Commit b061808d authored by Alexander Graf's avatar Alexander Graf
Browse files

linux-headers: update linux headers to kvm/next 



This updates the kvm headers to commit 820b3fcd in kvm/next.

Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent 2872e192

linux-headers/asm-arm/kvm.h

+6 −4
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 
#define __ARM_KVM_H__



#include <linux/types.h>

#include <linux/psci.h>

#include <asm/ptrace.h>



#define __KVM_HAVE_GUEST_DEBUG
@@ -83,6 +84,7 @@ struct kvm_regs { 
#define KVM_VGIC_V2_CPU_SIZE		0x2000



#define KVM_ARM_VCPU_POWER_OFF		0 /* CPU is started in OFF state */

#define KVM_ARM_VCPU_PSCI_0_2		1 /* CPU uses PSCI v0.2 */



struct kvm_vcpu_init {

	__u32 target;
@@ -201,9 +203,9 @@ struct kvm_arch_memory_slot { 
#define KVM_PSCI_FN_CPU_ON		KVM_PSCI_FN(2)

#define KVM_PSCI_FN_MIGRATE		KVM_PSCI_FN(3)



#define KVM_PSCI_RET_SUCCESS		0

#define KVM_PSCI_RET_NI			((unsigned long)-1)

#define KVM_PSCI_RET_INVAL		((unsigned long)-2)

#define KVM_PSCI_RET_DENIED		((unsigned long)-3)

#define KVM_PSCI_RET_SUCCESS		PSCI_RET_SUCCESS

#define KVM_PSCI_RET_NI			PSCI_RET_NOT_SUPPORTED

#define KVM_PSCI_RET_INVAL		PSCI_RET_INVALID_PARAMS

#define KVM_PSCI_RET_DENIED		PSCI_RET_DENIED



#endif /* __ARM_KVM_H__ */

linux-headers/asm-arm64/kvm.h

+8 −5
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
#define KVM_NR_SPSR	5



#ifndef __ASSEMBLY__

#include <linux/psci.h>

#include <asm/types.h>

#include <asm/ptrace.h>
@@ -56,8 +57,9 @@ struct kvm_regs { 
#define KVM_ARM_TARGET_FOUNDATION_V8	1

#define KVM_ARM_TARGET_CORTEX_A57	2

#define KVM_ARM_TARGET_XGENE_POTENZA	3

#define KVM_ARM_TARGET_CORTEX_A53	4



#define KVM_ARM_NUM_TARGETS		4

#define KVM_ARM_NUM_TARGETS		5



/* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */

#define KVM_ARM_DEVICE_TYPE_SHIFT	0
@@ -77,6 +79,7 @@ struct kvm_regs { 


#define KVM_ARM_VCPU_POWER_OFF		0 /* CPU is started in OFF state */

#define KVM_ARM_VCPU_EL1_32BIT		1 /* CPU running a 32bit VM */

#define KVM_ARM_VCPU_PSCI_0_2		2 /* CPU uses PSCI v0.2 */



struct kvm_vcpu_init {

	__u32 target;
@@ -186,10 +189,10 @@ struct kvm_arch_memory_slot { 
#define KVM_PSCI_FN_CPU_ON		KVM_PSCI_FN(2)

#define KVM_PSCI_FN_MIGRATE		KVM_PSCI_FN(3)



#define KVM_PSCI_RET_SUCCESS		0

#define KVM_PSCI_RET_NI			((unsigned long)-1)

#define KVM_PSCI_RET_INVAL		((unsigned long)-2)

#define KVM_PSCI_RET_DENIED		((unsigned long)-3)

#define KVM_PSCI_RET_SUCCESS		PSCI_RET_SUCCESS

#define KVM_PSCI_RET_NI			PSCI_RET_NOT_SUPPORTED

#define KVM_PSCI_RET_INVAL		PSCI_RET_INVALID_PARAMS

#define KVM_PSCI_RET_DENIED		PSCI_RET_DENIED



#endif

linux-headers/asm-mips/kvm.h

+35 −0
Original line number Diff line number Diff line
@@ -106,6 +106,41 @@ struct kvm_fpu { 
#define KVM_REG_MIPS_LO (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 33)

#define KVM_REG_MIPS_PC (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 34)



/* KVM specific control registers */



/*

 * CP0_Count control

 * DC:    Set 0: Master disable CP0_Count and set COUNT_RESUME to now

 *        Set 1: Master re-enable CP0_Count with unchanged bias, handling timer

 *               interrupts since COUNT_RESUME

 *        This can be used to freeze the timer to get a consistent snapshot of

 *        the CP0_Count and timer interrupt pending state, while also resuming

 *        safely without losing time or guest timer interrupts.

 * Other: Reserved, do not change.

 */

#define KVM_REG_MIPS_COUNT_CTL		(KVM_REG_MIPS | KVM_REG_SIZE_U64 | \

					 0x20000 | 0)

#define KVM_REG_MIPS_COUNT_CTL_DC	0x00000001



/*

 * CP0_Count resume monotonic nanoseconds

 * The monotonic nanosecond time of the last set of COUNT_CTL.DC (master

 * disable). Any reads and writes of Count related registers while

 * COUNT_CTL.DC=1 will appear to occur at this time. When COUNT_CTL.DC is

 * cleared again (master enable) any timer interrupts since this time will be

 * emulated.

 * Modifications to times in the future are rejected.

 */

#define KVM_REG_MIPS_COUNT_RESUME	(KVM_REG_MIPS | KVM_REG_SIZE_U64 | \

					 0x20000 | 1)

/*

 * CP0_Count rate in Hz

 * Specifies the rate of the CP0_Count timer in Hz. Modifications occur without

 * discontinuities in CP0_Count.

 */

#define KVM_REG_MIPS_COUNT_HZ		(KVM_REG_MIPS | KVM_REG_SIZE_U64 | \

					 0x20000 | 2)



/*

 * KVM MIPS specific structures and definitions

 *

linux-headers/asm-powerpc/kvm.h

+1 −1
Original line number Diff line number Diff line
@@ -545,7 +545,6 @@ struct kvm_get_htab_header { 
#define KVM_REG_PPC_TCSCR	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb1)

#define KVM_REG_PPC_PID		(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb2)

#define KVM_REG_PPC_ACOP	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb3)

#define KVM_REG_PPC_WORT	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb4)



#define KVM_REG_PPC_VRSAVE	(KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb4)

#define KVM_REG_PPC_LPCR	(KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb5)
@@ -555,6 +554,7 @@ struct kvm_get_htab_header { 
#define KVM_REG_PPC_ARCH_COMPAT	(KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb7)



#define KVM_REG_PPC_DABRX	(KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb8)

#define KVM_REG_PPC_WORT	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb9)



/* Transactional Memory checkpointed state:

 * This is all GPRs, all VSX regs and a subset of SPRs

linux-headers/asm-powerpc/kvm_para.h

+6 −0
Original line number Diff line number Diff line
@@ -82,10 +82,16 @@ struct kvm_vcpu_arch_shared { 


#define KVM_FEATURE_MAGIC_PAGE	1



/* Magic page flags from host to guest */



#define KVM_MAGIC_FEAT_SR		(1 << 0)



/* MASn, ESR, PIR, and high SPRGs */

#define KVM_MAGIC_FEAT_MAS0_TO_SPRG7	(1 << 1)



/* Magic page flags from guest to host */



#define MAGIC_PAGE_FLAG_NOT_MAPPED_NX	(1 << 0)





#endif /* __POWERPC_KVM_PARA_H__ */