Commit b019f5e5 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-misc-20181214' into staging 



miscellaneous patches:
 * checkpatch.pl: Enforce multiline comment syntax
 * Rename cpu_physical_memory_write_rom() to address_space_write_rom()
 * disas, monitor, elf_ops: Use address_space_read() to read memory
 * Remove load_image() in favour of load_image_size()
 * Fix some minor memory leaks in arm boards/devices
 * virt: fix broken indentation

# gpg: Signature made Fri 14 Dec 2018 14:41:20 GMT
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-misc-20181214: (22 commits)
  virt: Fix broken indentation
  target/arm: Create timers in realize, not init
  tests/test-arm-mptimer: Don't leak string memory
  hw/sd/sdhci: Don't leak memory region in sdhci_sysbus_realize()
  hw/arm/mps2-tz.c: Free mscname string in make_dma()
  target/arm: Free name string in ARMCPRegInfo hashtable entries
  include/hw/loader.h: Document load_image_size()
  hw/core/loader.c: Remove load_image()
  device_tree.c: Don't use load_image()
  hw/block/tc58128.c: Don't use load_image()
  hw/i386/multiboot.c: Don't use load_image()
  hw/i386/pc.c: Don't use load_image()
  hw/pci/pci.c: Don't use load_image()
  hw/smbios/smbios.c: Don't use load_image()
  hw/ppc/ppc405_boards: Don't use load_image()
  hw/ppc/mac_newworld, mac_oldworld: Don't use load_image()
  elf_ops.h: Use address_space_write() to write memory
  monitor: Use address_space_read() to read memory
  disas.c: Use address_space_read() to read memory
  Rename cpu_physical_memory_write_rom() to address_space_write_rom()
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 58b1f0f2 bbac02f1

device_tree.c

+1 −1
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@ void *load_device_tree(const char *filename_path, int *sizep) 
    /* First allocate space in qemu for device tree */

    fdt = g_malloc0(dt_size);



    dt_file_load_size = load_image(filename_path, fdt);

    dt_file_load_size = load_image_size(filename_path, fdt, dt_size);

    if (dt_file_load_size < 0) {

        error_report("Unable to open device tree file '%s'",

                     filename_path);

disas.c

+4 −1
Original line number Diff line number Diff line
@@ -588,7 +588,10 @@ static int 
physical_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,

                     struct disassemble_info *info)

{

    cpu_physical_memory_read(memaddr, myaddr, length);

    CPUDebug *s = container_of(info, CPUDebug, info);



    address_space_read(s->cpu->as, memaddr, MEMTXATTRS_UNSPECIFIED,

                       myaddr, length);

    return 0;

}

docs/devel/loads-stores.rst

+16 −19
Original line number Diff line number Diff line
@@ -253,6 +253,22 @@ Regexes for git grep 
 - ``\<address_space_ldu\?[bwql]\(_[lb]e\)\?\>``

 - ``\<address_space_st[bwql]\(_[lb]e\)\?\>``



``address_space_write_rom``

~~~~~~~~~~~~~~~~~~~~~~~~~~~



This function performs a write by physical address like

``address_space_write``, except that if the write is to a ROM then

the ROM contents will be modified, even though a write by the guest

CPU to the ROM would be ignored. This is used for non-guest writes

like writes from the gdb debug stub or initial loading of ROM contents.



Note that portions of the write which attempt to write data to a

device will be silently ignored -- only real RAM and ROM will

be written to.



Regexes for git grep

 - ``address_space_write_rom``



``{ld,st}*_phys``

~~~~~~~~~~~~~~~~~
@@ -315,25 +331,6 @@ For new code they are better avoided: 
Regexes for git grep

 - ``\<cpu_physical_memory_\(read\|write\|rw\)\>``



``cpu_physical_memory_write_rom``

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~



This function performs a write by physical address like

``address_space_write``, except that if the write is to a ROM then

the ROM contents will be modified, even though a write by the guest

CPU to the ROM would be ignored.



Note that unlike ``cpu_physical_memory_write()`` this function takes

an AddressSpace argument, but unlike ``address_space_write()`` this

function does not take a ``MemTxAttrs`` or return a ``MemTxResult``.



**TODO**: we should probably clean up this inconsistency and

turn the function into ``address_space_write_rom`` with an API

matching ``address_space_write``.



``cpu_physical_memory_write_rom``





``cpu_memory_rw_debug``

~~~~~~~~~~~~~~~~~~~~~~~

exec.c

+19 −11
Original line number Diff line number Diff line
@@ -3388,8 +3388,12 @@ enum write_rom_type { 
    FLUSH_CACHE,

};



static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as,

    hwaddr addr, const uint8_t *buf, int len, enum write_rom_type type)

static inline MemTxResult address_space_write_rom_internal(AddressSpace *as,

                                                           hwaddr addr,

                                                           MemTxAttrs attrs,

                                                           const uint8_t *buf,

                                                           int len,

                                                           enum write_rom_type type)

{

    hwaddr l;

    uint8_t *ptr;
@@ -3399,8 +3403,7 @@ static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as, 
    rcu_read_lock();

    while (len > 0) {

        l = len;

        mr = address_space_translate(as, addr, &addr1, &l, true,

                                     MEMTXATTRS_UNSPECIFIED);

        mr = address_space_translate(as, addr, &addr1, &l, true, attrs);



        if (!(memory_region_is_ram(mr) ||

              memory_region_is_romd(mr))) {
@@ -3423,13 +3426,16 @@ static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as, 
        addr += l;

    }

    rcu_read_unlock();

    return MEMTX_OK;

}



/* used for ROM loading : can write in RAM and ROM */

void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,

MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,

                                    MemTxAttrs attrs,

                                    const uint8_t *buf, int len)

{

    cpu_physical_memory_write_rom_internal(as, addr, buf, len, WRITE_DATA);

    return address_space_write_rom_internal(as, addr, attrs,

                                            buf, len, WRITE_DATA);

}



void cpu_flush_icache_range(hwaddr start, int len)
@@ -3444,8 +3450,9 @@ void cpu_flush_icache_range(hwaddr start, int len) 
        return;

    }



    cpu_physical_memory_write_rom_internal(&address_space_memory,

                                           start, NULL, len, FLUSH_CACHE);

    address_space_write_rom_internal(&address_space_memory,

                                     start, MEMTXATTRS_UNSPECIFIED,

                                     NULL, len, FLUSH_CACHE);

}



typedef struct {
@@ -3873,8 +3880,9 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, 
            l = len;

        phys_addr += (addr & ~TARGET_PAGE_MASK);

        if (is_write) {

            cpu_physical_memory_write_rom(cpu->cpu_ases[asidx].as,

                                          phys_addr, buf, l);

            address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr,

                                    MEMTXATTRS_UNSPECIFIED,

                                    buf, l);

        } else {

            address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,

                             MEMTXATTRS_UNSPECIFIED,

hw/arm/mps2-tz.c

+1 −0
Original line number Diff line number Diff line
@@ -322,6 +322,7 @@ static MemoryRegion *make_dma(MPS2TZMachineState *mms, void *opaque, 
    sysbus_connect_irq(s, 2, qdev_get_gpio_in_named(iotkitdev,

                                                    "EXP_IRQ", 57 + i * 3));



    g_free(mscname);

    return sysbus_mmio_get_region(s, 0);

}